The Capacitor Stack: How Energy Storage Became Core Compute Infrastructure

Rack power has grown more than 4x in two years, and the industry is openly designing for 1MW racks. Below ~200kW, conventional AC distribution and software smoothing suffice. Between 200-350kW, capacitive peak absorption becomes economically compelling. Above ~350kW, the entire 2027+ roadmap, the 800VDC architecture with native energy shelves becomes the default, and with it a new, large, and structurally growing demand pool for every layer of the capacitor stack.

One pulsed load, four capacitor markets

The clean way to hold this space in your head is as a timescale ladder. Each rung is a distinct component market with distinct suppliers, cost structures, and competitive dynamics, and AI has tightened supply on every rung simultaneously, for the same root cause.

Hybrid supercapacitors: the contested crown jewel

The technology, briefly and precisely

A hybrid supercapacitor (HSC), commercially dominated by the lithium-ion capacitor (LIC) architecture, is an asymmetric device: a battery-type anode (graphite or hard carbon, pre-doped with lithium ions) paired with an EDLC-type cathode (high-surface-area activated carbon). The asymmetry is the entire point. The pre-doped anode drags the cell voltage up to 3.8-4.0V (vs. 2.7-3.0V for symmetric EDLCs) and contributes faradaic energy storage; the capacitive cathode preserves the power delivery and cycle life of a capacitor. The result lands precisely in the gap the AI load profile created:

• Energy density ~20-25 Wh/kg, roughly 3-4x large-format EDLCs (~5-7 Wh/kg), up to 10x smaller ones. Enough for seconds of ride-through at hundreds of kW in a shelf-sized form factor.
• Cycle life 50,000 to 1M+ cycles under continuous micro-cycling, the duty that destroys Li-ion in months.
• Voltage economics: ~200-210 series cells for an 800V string vs. ~300 for EDLC, fewer cells, fewer balancing circuits, less interconnect.
• Safety: no Li-ion thermal-runaway profile; UL-certified cells exist; dramatically lighter fire-code treatment (NFPA 855) inside white space.

Value proposition and market drivers

The HSC's job in the 800VDC architecture is the 10ms. 10s window: load smoothing, ride-through, and peak shaving at the power shelf, rack, and sidecar. Three demand drivers compound:

1. Capex arbitrage. Buffering lets operators provision the upstream chain to average load, with peak-load sizing receding, the economic engine behind NVIDIA's ~30% peak-reduction claim. At gigawatt campus scale, 30% of grid allocation is worth billions.
2. Grid compliance. Utilities increasingly cap ramp rates in interconnect agreements. Rack-level capacitive buffering converts a compliance obligation into a component purchase order.
3. Architecture design-in. The OCP/NVIDIA reference architecture includes capacitive energy shelves natively. Neoclouds (CoreWeave, Lambda, Nebius, Together, OCI) inherit the reference design wholesale, an attach-rate story.

Market size: read the scope before the number

Supercapacitor market estimates diverge wildly, from ~$0.6B to ~$17B for 2026, and the divergence is informative, not embarrassing: it is almost entirely a scope question (bare cells vs. modules vs. integrated systems; whether adjacent hybrid storage systems are counted). For working purposes I anchor on a device-level category of roughly $1-3B in 2026, growing at ~15-26% CAGR depending on scope, with hybrid/LIC devices the fastest-growing configuration (~17-26% CAGR; roughly a quarter to 40%+ of new installations by various counts). The datacenter segment is the swing factor: effectively near-zero in 2024, it is the single largest source of forecast variance for 2027-2030.

The defining fact of 2026: the supply gap

Demand estimates circulating in H1 2026 put AI-server supercapacitor requirements at ~15-18 million units against roughly 6.5 million units of annual capacity at Musashi, the category leader. That is a structural 2-3x shortfall. Panasonic's first datacenter-dedicated shipments (its FY2027, beginning April 2026) were effectively pre-sold before leaving the factory. Hyperscaler qualification cycles run 12-18 months, so even capacity now under construction converts to qualified supply slowly. The bottleneck runs through cell supply (demand and technology are not the gating factors).

Key players and approximate positioning

Underneath the cell: the component supply chain

For PE diligence, the cell makers are the visible layer; the leverage often lands one level down. An LIC cell decomposes into six critical material systems, several with chokepoint structures tighter than the cell market itself:

The China question: the supply-side wildcard

One line about "Chinese entrants" undersells the single largest uncertainty on the supply side. China already dominates supercapacitors in its home applications, Shanghai Aowei's ultracap buses, CRRC's rail and grid programs, Jianghai's capacitor franchise spanning electrolytics into EDLC/LIC, and Chinese LIC cell lines are scaling now with reported cost positions 30-50% below Japanese incumbents, riding the Li-ion ecosystem's shared materials base (anodes, electrolyte, lithium) at Chinese scale.

What keeps this capacity out of hyperscale sockets is gated by three stacked frictions; technology stays below the binding constraint: (1) qualification, 12-18 month hyperscaler cycles with reliability data requirements that favor incumbents with decades of field hours; (2) provenance, US and increasingly EU supply-chain rules, tariff exposure, and hyperscaler procurement policies that treat Chinese energy-storage content as a compliance risk in critical infrastructure; (3) design lock-in, once the OCP shelf spec and NVIDIA reference qualify specific cells, the socket is sticky for a platform generation. The strategic read: this is a moat. The base case is a bifurcated market, Japanese/Korean/EU cells in Western hyperscale, Chinese cells in Chinese datacenters (a very large market in its own right) and the global industrial tail. The bear case for incumbent pricing is a 2028 scenario where the Western supply gap persists, a Tier-2 cloud breaks ranks to qualify a Chinese cell, and the price umbrella collapses 30%+ in a year. Watch for exactly one datapoint: the first non-Chinese cloud operator publicly deploying Chinese LIC cells. That is the umbrella's first tear.

EDLCs: squeezed, but indispensable through 2027

The symmetric electric double-layer capacitor is the incumbent being compressed from both directions, HSCs above it on energy density, improving electrolytics plus software smoothing below it on cost. Yet the EDLC is what supports the 2026 datacenter deployments: proven, safe, extreme cycle life, mature multi-source supply, and available now while HSC capacity is oversubscribed. Panasonic's current rack/zone/distribution-level peak-shaving line is EDLC-led. The category retains durable non-datacenter strongholds, wind pitch control, rail regeneration, industrial ride-through, automotive backup, and grows overall even as classic EDLC's share of the supercapacitor category declines (EDLC held ~55% of category revenue in 2026 by Mordor's count, with hybrids growing ~3-4 points faster annually).

The Maxwell parable is worth a paragraph, because it explains today's market structure. Maxwell Technologies effectively invented the commercial ultracapacitor category, was acquired by Tesla in 2019 primarily for its dry-electrode battery IP, and its ultracap business was divested to UCAP Power in 2021. The years of ownership churn coincided exactly with the formation of the AI demand wave, leaving the category's original leader sub-scale precisely when the largest demand pool in its history arrived. The AI datacenter cycle is being won by Musashi, Panasonic, and the integrators, while the dry-electrode processing IP that Tesla kept is, ironically, now a key cost-down vector for the whole industry (LICAP being the notable independent practitioner).

The displaced incumbent: aluminium electrolytics and polymer

Completeness demands a section most analyses skip: the technology the HSC is displacing. Today's GB300 power shelves do their smoothing with aluminium electrolytic capacitors, the incumbent bulk-storage technology of every PSU ever built, an ~$8-10B global category led by Nippon Chemi-Con, Rubycon, Nichicon, and Panasonic. These are the current holders of the power-shelf socket, and they are responding: Chemi-Con has launched immersion-cooling-compatible capacitors specifically for AI servers, and shelf-grade electrolytic content per rack has been rising with the GB300 storage step-up. The displacement dynamic is therefore subtle: the electrolytic makers enjoy a strong 2025-27 cycle as storage content grows, then face structural substitution at the shelf level as the Rubin/Kyber generation migrates bulk storage to supercapacitor-class devices, while conductive polymer capacitors (Panasonic's SP-Cap franchise, polymer tantalum from Kyocera-AVX and Yageo/Kemet) keep growing on-board where their low ESR earns the socket regardless. Portfolio read: the pure-play electrolytic names are enjoying a cyclical peak inside a secular handover, the classic value trap setup if the handover is mispriced, and a pivot story for whichever of them buys or builds a hybrid-capacitor position (Nichicon already sells small LICs).

MLCCs: the shortage economy arrives

Why AI broke the MLCC market

Multilayer ceramic capacitors operate six-plus orders of magnitude below HSCs in energy, microfarads, handling the microsecond-to-millisecond decoupling layer. They stay apart from HSC substitutes and never will substitute; they are the same problem's other end. What AI did to this market is arithmetic: an AI server carries 10-15x the MLCC content of a general-purpose server. A GB300-class system includes ~30,000 MLCCs; a VR200 NVL72 rack approaches ~600,000The specification mix shifted simultaneously toward the hardest parts to make: ultra-high-capacitance (Murata's 47µF in an 0402 case, ~800 dielectric layers, a world first), higher voltage classes for 800V ecosystems, low-ESL geometries, and embedded MLCCs for in-substrate placement (Taiyo Yuden's 22µF 0402).

The result, visible across 2026: high-end line utilization at 90-95%, lead times stretched from ~4 to ~20 weeks, reported AI-server orders at ~2x Murata's available capacity, and the first broad, coordinated price increases in years. Murata raised prices 15-35% effective April 1, 2026 (AI-server high-cap, automotive, RF); Samsung Electro-Mechanics followed at +15-20%, Taiyo Yuden +15-25%, Yageo/Kemet +10-15%, with a further +20-30% projected for H2 2026 on high-cap grades. Murata is deploying ¥250B of FY2026 capex (¥80B for server-grade MLCC) yet guides only ~20% capacity growth over two years, deliberately short of demand growth. This is a supplier's market by choice as much as by constraint: the top three learned the lessons of the 2018 MLCC cycle and are prioritizing price over share.

Market size and structure

The MLCC market is measured more consistently than supercapacitors: 2026 estimates cluster around $15-23B (with outliers to $32B on broader scopes), growing 6-15% CAGR depending on the house, with the AI/high-cap mix growing far faster than the blended rate. Structure is a stable oligopoly: Murata (~31-32%) leads, followed by Samsung Electro-Mechanics (~19-20%), Taiyo Yuden (~13%), TDK (~10%), Yageo/Kemet (~8-9%), with Kyocera-AVX, Walsin, Samwha, and Chinese entrants (Fenghua, Three-Circle) in the tail, the top five controlling roughly 70% of revenue. Premium AI mix concentrates economics further toward the top three, who alone can yield ultra-high-cap small-case parts at scale.

The MLCC component chain

Silicon capacitors: the structural design-in

Deep-trench silicon capacitors compete with MLCCs at the point-of-load, and their story is about geometry,000A+ at sub-volt rails, decoupling must sit inside the package, where discrete MLCCs physically cannot go. Proven for a decade in RF/mobile (Murata's IPDiA lineage), the category crossed its commercial Rubicon in May 2026 when Samsung Electro-Mechanics announced a silicon capacitor supply contract worth ~$1B with a major global customer for 2027-28 delivery, the first billion-dollar commitment in the category's history, built on SEMCO's unique full-stack position (silicon caps + FC-BGA substrate + MLCC as one bundled power-integrity offering). TSMC brings a logic-derived trench structure natural to CoWoS-class integration; Murata/IPDiA defends the incumbent trench franchise; Empower and substrate players (Ibiden, Shinko ecosystem) build embedding routes.

Hurdles exist: cost per µF remains ~5-10x MLCC (so adoption pencils only where MLCCs can't go), capacitance density trails, and the qualified supplier base is a handful of names against a vast MLCC ecosystem. The trigger that changes the slope is backside power delivery on 2nm-class accelerators (Intel PowerVia-class, TSMC A16-era): once power enters through the wafer backside, silicon capacitance is designed in structurally, a 2026-28 design-in window for 2027-29 silicon, compounded by co-packaged optics in the Feynman era. Broad-scope market estimates (~$1.9B in 2026) mostly measure the legacy RF/medical base; the AI-substrate niche is small today and is precisely where the growth concentrates. Expect silicon caps and MLCCs to split the power delivery network by physics, in-package vs. on-board.

Can Li-ion take the socket back?

The battery industry's counterattack is coming, and it is well-funded, worth steelmanning. The candidates: lithium-titanate (LTO), Toshiba's SCiB heritage, 20,000+ deep cycles, wide temperature range, intrinsically safer chemistry; high-C-rate LFP, riding the largest manufacturing base in energy storage history; and sodium-ion power cells (CATL's Naxtra generation, BYD), which remove lithium exposure and improve safety further. All three are cheaper per Wh than any supercapacitor by roughly an order of magnitude, and all three are pushing power density upward each generation.

They still lose the smoothing socket on arithmetic. A training workload's power oscillation cycles roughly every couple of seconds, continuously. That is on the order of 15 million micro-cycles per yearAn exceptional LTO cell survives perhaps 40,000 deep cycles. Call it a few hundred thousand shallow ones with generous derating. The best battery on the market is consumed in weeks against a duty an HSC shrugs at for a decade. Depth-of-discharge management can stretch this (shallow cycling extends battery life materially), but shallow cycling means oversizing, and oversized LTO at datacenter reliability grades erases the cost advantage while retaining the NFPA 855 fire-code burden inside white space. The batteries' defensible ground is a fact but bounded: the seconds-to-minutes autonomy socket (BBU shelves, bridge-to-generator), where energy density genuinely dominates and cycling is rare. The likely 2028+ equilibrium is explicitly hybrid. HSC handles the churn; a smaller and longer-lived battery bank holds the autonomy. This increases total storage content per rack; picking one winner misses the hybrid outcome. The battery industry's best outcome in this niche is coexistence; its realistic worst case is watching silicon-anode HSCs (40-50+ Wh/kg on the lab-to-fab path) eat the bottom of the BBU segment from below.

Where this goes: growth, technology, and the M&A chessboard

A bottom-up TAM: sizing from racks

Earlier I argued that when analyst estimates span an order of magnitude, the useful move is to build the number yourself. So: the model, with every assumption visible so you can break it.

• Content per rack. A Kyber-class 600kW rack needs a usable capacitive buffer on the order of 250-500Wh (seconds-scale smoothing of a several-hundred-kW swing). At volume LIC cell economics of roughly $8-15/Wh, plus shelf electronics, controls, and integration at a 1.8-2.2x system multiple, installed capacitive-storage content lands around $8,000-15,000 per 600kW rack (proportionately less for 200-350kW racks on EDLC-class solutions, ~$2-5k).
• Rack volumes. AI rack-scale system shipments across NVIDIA and the AMD/custom-silicon ecosystem plausibly run 60-90k units in 2027, growing 30-50% annually in the base case, with the high-density (HSC-relevant) share rising from perhaps a third in 2027 toward the large majority by 2030.
• Attach rate. Near-100% for 800VDC-native racks (the shelf is in the reference design); partial for AC-architecture racks retrofitting peak absorption; plus a retrofit stream into the 2025-26 installed base and sidecar/facility-level systems on top.

Multiply through and you get the scenario band below: roughly $0.8-1.4B in 2027, $3-6B by 2030 in the base case, with a bear case (AI capex air-pocket, densities plateau at 350kW, software smoothing over-delivers) still clearing ~$1.5B by 2030 and a bull case (1MW racks on schedule, retrofit wave, grid-compliance mandates spreading) approaching $8-9B. For calibration: the base case implies datacenter alone becomes comparable to the entire pre-AI supercapacitor category within four years, which is exactly what the 20x storage step-up and the supply gap are already telling you.

Profit pools: where the margin is placed, and where it migrates

The scarcity rent of 2026-27 runs unevenly along the chain, and its distribution will invert as the market normalizes. The current stack, in indicative gross-margin terms: advanced materials (qualified activated carbon, separators, pre-doping lithium) at 30-45% and rising, chokepoint suppliers price against scarcity; cells at 35-50% in shortage conditions, the widest pool today, and the reason cell capacity is the M&A prize; modules at 20-30%; and shelves/integrated systems at 15-25%, respectable but structurally the most exposed layer. The mechanism of migration is standardization: once the OCP energy-shelf specification lands (targeted from YE2026) and second sources qualify, the shelf becomes a spec-built commodity the way ORv3 power shelves did. Integration margin compresses toward low teens by 2029, while qualified cell and materials margin holds far better because qualification, process IP (dry electrode, pre-doping), and materials chokepoints don't commoditize on the same clock. The investable conclusion: own the layers protected by qualification and process IP; rent the layers protected only by being early.

The ramp timeline

• CY2026 (now): qualification year. Vera Rubin ramps with 20x storage; Vertiv and peers release 800VDC portfolios in H2; HSC supply gap sets pricing; EDLC supports deployments as the bridge.
• CY2027: the inflection. Kyber/Rubin Ultra at 600kW on 800VDC; energy shelves at volume; Panasonic FY2027 shipments land; first large HSC fleet deployments at neoclouds and one or two hyperscalers. Supply still gates.
• CY2028-29: the steep part. 800VDC default above ~300kW; multi-vendor qualified HSC base; retrofit of 2025-26 builds; solid-state transformers begin hollowing out the sidecar's conversion role, while making the capacitor shelf more necessary (an SST has none of a line-frequency transformer's forgiving thermal mass; its stiffness must be synthesized, largely by capacitive storage).

Technology disruption watch list

The M&A chessboard

Scarce, qualified, strategically located capacity in a 2-3x undersupplied category is a textbook acquisition setup. The board as I read it:

Valuation framing: what would you pay?

Three anchors. Precedent: Tesla paid ~$218M for all of Maxwell Technologies in 2019, the category's then-leader, acquired for its battery IP with the ultracap business thrown in and divested two years later for an undisclosed (small) sum. That deal priced the ultracapacitor franchise at close to zero, five years before the largest demand shock in its history. It is the benchmark every corporate development team currently "monitoring the space" should study. Scarcity heuristic: in a 2-3x undersupplied market, qualified capacity is worth a multiple of its revenue-generating potential, if a datacenter-grade LIC cell generates $50-100 of revenue and the gap persists through 2028, an EV of 2-4x forward capacity-revenue for a qualified line is defensible before any terminal-value argument, implying the leading franchise is a multi-billion-dollar asset on its ramp trajectory. Carve-out arbitrage: auto-parts parents trade at 5-8x EBITDA; scarce energy-storage pure-plays in a structural shortage command mid-teens to 20x+. The same asset is worth 2-3x more outside the parent than inside it, which is precisely the pressure that produces minority-stake-plus-offtake deals first, and control transactions when the parent needs ramp capital it cannot fund. On the private side, Skeleton's cumulative funding (north of €300M across rounds, with Siemens and Marubeni among backers) sets the reference for what EU-sovereignty-positioned capacity raises at; an IPO or strategic sale prices the sovereignty premium explicitly. None of this is a price target. It is the frame a buyer's IC will use.

Trade-offs and who wins

The trade-off map:

• HSC vs. EDLC: energy density and voltage vs. availability, multi-sourcing, and forty years of field data. Through 2027, EDLC wins deployments it "shouldn't" purely on supply. The substitute for an HSC isn't a better device, it's an uglier system architecture (EDLC + Li-ion hybrids recreating the HSC across two supply chains), which is why HSC wins the 2028+ steady state.
• Capacitors vs. software: NVIDIA's power-cap/ramp-control/GPU-burn stack shaves the transient profile and could keep sub-300kW racks on cheaper storage. Above that, physics and grid compliance need hardware. The bear case for the whole stack is a software-plus-electrolytics world at lower-than-expected rack densities, worth stress-testing in any model.
• Pricing power vs. demand destruction: MLCC and supercap price increases are rational oligopoly behavior, but H2 2026 projections of +30-50% on ultra-high-cap grades will accelerate design-outs (silicon caps, embedded solutions, electrolytic conversion in reverse) at the margin.
• Winners: Musashi (if it can fund the ramp), Panasonic, the MLCC top three, SEMCO's full-stack silicon-cap position, Flex and the sidecar OEMs, and the quiet materials chokepoints (Kuraray, Nippon Kodoshi, Sumitomo Metal Mining). Pressured: the EDLC tail, UCAP-class sub-scale players, Li-ion BBU in white space (fire-code plus cycle-life headwinds), and any capacitor franchise still selling on 2024 price lists.
• The demand-side risk that dominates all of it: an AI capex air-pocket shifts every curve right. The attach-rate thesis (storage per MW rises with density) survives a correction; the 2027 volume estimates may not.

Standards and regulation: certification timing is adoption timing

The unglamorous layer that sets the ramp slope. The instruments that matter: UL 810A (electrochemical capacitors, the certification that lets an HSC shelf into a North American data hall; Musashi's UL-certified cells are a genuine moat); the IEC 62391/62576/62813 family (EDLC and LIC test methods, the common language of qualification); NFPA 855 (stationary energy storage, the fire-code regime whose Li-ion burdens are the supercapacitor's quiet sales argument, and whose treatment of large capacitive installations is still being clarified, a watch item, since an adverse interpretation is a tail risk to the white-space deployment model); the OCP energy-shelf and 800VDC standards (initial specifications targeted from YE2026, the commoditization clock of the profit-pool section); and DC-side electrical codes (IEC 60364 DC provisions, UL DC-rated protection), where standards genuinely lag the hardware and where an incident during the 2027 ramp would be the sector's biggest self-inflicted risk. Two supply-side regulatory vectors: the EU Critical Raw Materials Act lists natural graphite and lithium, both LIC anode-side inputs, creating both compliance burden and a subsidy case for EU cell capacity (Skeleton's tailwind); and US/Japanese onshoring incentives (IRA-adjacent programs, METI support) that drive where the next tranche of capacity lands.

Sustainability: the ESG case writes itself, mostly

Increasingly a gating item in both hyperscaler procurement and PE investment committees, and the capacitor stack scores unusually well. HSCs and EDLCs contain no cobalt and no nickel cathode, deliver 15+ year service life against 3-7 for cycled batteries (less replacement, less embodied carbon per service-year), present minimal fire risk (a facility-insurance and water-usage argument as well as a safety one), and decompose at end-of-life into aluminium, copper, and carbon, a far simpler recycling problem than Li-ion's black mass. The honest caveats: LICs do consume lithium (pre-doping) and graphite (anode), modest quantities per cell, but the CRMA exposure above is documented; EDLC electrolytes use acetonitrile, a toxic solvent demanding proper handling and end-of-life control; and the cathode's coconut-shell feedstock concentrates in Sri Lanka, the Philippines, and Indonesia, a supply chain whose traceability and agricultural ethics will attract scrutiny as volumes scale (and whose geographic concentration is itself a minor resilience flag). Net: a genuine ESG differentiator versus batteries, provided the industry gets ahead of the solvent and feedstock stories; waiting to be asked arrives too late.

Where the cells are made

The public-market exposure map

For analyst readers: the listed vehicles that touch each layer. Mapping only, nothing here is a recommendation, and purity varies enormously (most of these are diversified groups where the capacitor-stack exposure is one division or less).

The dashboard: ten leading indicators to watch

1. Kuraray capacitor-carbon capacity announcements, the materials layer moves first; carbon capex signals cell-maker conviction one step upstream.
2. Musashi plant ramp signals (utilization, hiring, parent capex disclosures in 7220.T filings), the supply gap's closing speed, readable quarterly.
3. OCP energy-shelf specification publication, starts the commoditization clock on integration margin.
4. First hyperscaler dual-source HSC qualification, ends single-supplier pricing power; watch Panasonic's FY2027 customer disclosures.
5. H2 2026 MLCC price realization, whether the projected +20-30% on high-cap grades sticks tells you if oligopoly discipline holds into 2027.
6. First non-Chinese cloud deploying Chinese LIC cells, the price-umbrella tear (§China).
7. BSPDN accelerator tape-outs with embedded silicon caps, converts the silicon-cap thesis from optionality to backlog.
8. NFPA/AHJ treatment of large capacitive installations, the regulatory tail risk to white-space deployment.
9. A Musashi minority-stake or offtake announcement, the predicted first move on the M&A board; its counterparty tells you which acquirer archetype is winning.
10. Rack-density reality vs. roadmap, actual 2027 Kyber deployment counts against plan; the whole stack's volume assumption in one number.

From 800V bus to GPU pin: the parasitic budget

An 800VDC data centre delivers power to compute silicon via a specific voltage cascade, and every step of that cascade requires capacitance sized to a particular set of parasitic constraints. Each layer of the capacitor stack maps to a specific stage; each has its own ESR (series resistance), ESL (series inductance), and bandwidth requirement.

1. 800V bus at rack inlet. DC-link capacitance provides bulk buffering between grid rectification transients and the downstream converters. Bulk Al electrolytic (moving toward polymer as ripple frequencies rise) or film for HV rating. Required ESR: low-milliohm range at 100Hz. 10kHz. Required ESL: not critical at these frequencies. Cable and busbar inductance dominates.
2. 800V → 48V (or 12V) intermediate bus converter. An LLC resonant converter or a DAB stage steps down. Bulk capacitance either side (polymer Al or hybrid polymer at the tens-of-µF scale) plus MLCC arrays at input and output for switching-frequency noise. ESR: sub-milliohm on the primary output. ESL: below 1nH for the MLCC bank feeding a ~500kHz switching stage.
3. 48V → 12V board-level DC-DC. Multi-phase buck converters on the accelerator PCB. Input MLCC arrays (hundreds of parts) handle switching noise; output caps (more MLCC arrays plus polymer bulk) handle load transients. ESR: hundreds of microohms per MLCC in parallel. ESL: dominated by PCB layout inductance, 100pH per capacitor and tens of pH aggregate.
4. 12V → 0.75V VRM at point-of-load. Multi-phase buck at 1MHz+ delivering thousands of amps to the accelerator package. Input caps decouple the VRM. Output caps have to absorb load transients on the microsecond scale at hundreds of amps: the fastest and hardest stage of the whole cascade. Requirements: sub-microohm aggregate ESR, sub-picohenry aggregate ESL. Achieved only by paralleling hundreds of MLCCs across multiple case sizes, and increasingly by supplementing with silicon capacitors embedded in the package substrate.
5. Under-die decoupling. The final sub-nanosecond transient at the transistor. Handled by silicon capacitors (deep-trench structures in the package substrate) and, on the die itself, on-die metal-oxide-metal (MoM) or metal-insulator-metal (MIM) capacitors. Loop inductance is the ceiling. Anything with a physical wire in the loop, even a µm-scale bond wire, has more inductance than the transient can tolerate.

Why the energy shelf runs in the sidecar

Every capacitor category on the AI power chain ages, and every one of them ages faster in heat. Aluminium electrolytics dry out. EDLC electrolytes decompose. HSC anodes lose lithium. MLCC dielectrics recrystallise. The rate follows the Arrhenius equation, which for a typical HSC or EDLC translates to a rule-of-thumb every operator recognises: lifetime halves for every 10°C rise in operating temperatureA 100,000-hour EDLC rated at 25°C degrades to 50,000 hours at 35°C, 25,000 hours at 45°C, and 12,500 hours (about 14 months) at 55°C.

That arithmetic decides where the energy shelf physically lands. A hot-aisle-adjacent placement, running at 40-50°C ambient in a densely-packed rack, cuts predicted service life by 4-8× against a datasheet-rated 25°C service life. Hyperscaler procurement teams underwriting 10-15 year deployments do not accept the arithmetic. The universal answer, visible in every 800VDC reference architecture published from 2025 onward, is sidecar placement: the energy shelf occupies a separate cabinet with dedicated liquid or air cooling, physically decoupled from the compute rack's thermal loop. HSCs and EDLCs get to run at 25-35°C ambient; predicted lifetime lands where the datasheet claims it does.

Cost per joule, density per cm³, and the buyer's fight to delay

A hyperscale architect specifying a capacitor solution runs two numbers simultaneously: cost per joule of usable energy stored and joules per cubic centimetre of white space consumedThe trade between them decides what technology wins each socket, and the trade looks different for every layer of the stack.

Two structural implications follow. First, adoption is a fight to delayEvery capacitor architecture more advanced than a standard MLCC or Al electrolytic adds a cost premium the buyer pays only when board space, thermal budget or yield loss force the hand. Silicon capacitors under a GPU exist because thousands of paralleled MLCCs still cannot get die impedance low enough. HSC energy shelves exist because Li-ion cycle life collapses under training-workload duty. The premium is the price of removing a physical constraint the cheaper alternative cannot remove.

Second, the two axes of the buyer's plane trade against each other differently by socketIn-package decoupling has no material cost sensitivity (a $50 silicon capacitor lands next to a $40,000 GPU) and extreme response-time sensitivity. Rack-level bulk storage is exactly opposite: the socket is cost-sensitive at the $/J level (a 500Wh energy shelf at $15/Wh is $7,500 per rack, a real BOM line) and response-time-insensitive above about 100ms. The technology that wins each socket is determined by which axis the buyer is willing to accept as dominant.

The stack, side-by-side

Every capacitor category discussed above, on the six variables an architect cares about, in one table.

Closing

The 800VDC transition converted a reliability accessory into a platform component, and in doing so created four simultaneous supply crunches at four different layers of the same power chain. The capacitor stack is now where the memory market was in the early cloud era: structurally undersupplied, consolidating around a few names with real process moats, with materials chokepoints one level down that most of the market hasn't priced, and with an M&A window that will not stay open past the point where hyperscaler qualification locks the supplier base. For operators: design the buffering architecture now, and secure qualified supply early. For investors: qualified capacity is where the pricing power lands, and the qualification cycle is measured in years.

Annex: how every derived number was built

Every figure in this piece is either published (traceable to a named source), derived (calculated from published inputs, with the arithmetic shown), or estimated (my judgement, flagged as such). This annex covers the latter two, and matches the sourcing discipline of Parts II, III and IV.

§A1. Content per rack and the 20× storage step-up

Status: published + derived. Published: NVIDIA's Vera Rubin platform disclosed a roughly 20× step-up in integrated energy storage vs the preceding GB300 generation; capacitor-based power smoothing has been demonstrated as native to the 2027 Kyber/800VDC reference architecture. Derived: capacitive buffer size per 600kW rack ≈ 250-500Wh of usable energy, based on target smoothing of a several-hundred-kW swing over seconds. At volume LIC cell economics of $8-15/Wh, plus system multiple 1.8-2.2x for shelf electronics, controls and integration, gives ~$8-15k installed content per 600kW rack (as used in the TAM build below). Sources: NVIDIA GTC 2025/2026 disclosures, OCP Q1 2026 power distribution whitepaper.

§A2. Bottom-up TAM model

Status: derived. Full workings.

Inputs. Content per rack: $8-15k per 600kW rack (§A1). AI rack shipments: 60-90k units in 2027 across the NVIDIA and AMD/custom-silicon ecosystem, growing 30-50% annually in the base case. High-density (HSC-relevant) share of rack shipments: ~33% in 2027, rising toward majority by 2030 as 800VDC becomes default at higher power classes. Attach rate: near 100% for 800VDC-native racks; partial for retrofit; plus a facility-side stream.

Base case. ~$0.6B shipping in 2026, rising to $0.8-1.4B in 2027 as the Kyber generation ramps, then $3-6B by 2030 as 1MW racks and retrofit demand compound.

Bear case. AI capex air-pocket cuts rack shipments 40%, densities plateau at 350kW so HSC-attach rate stalls, software smoothing over-delivers on transient absorption. Result: ~$1.5B by 2030.

Bull case. 1MW racks on schedule, retrofit wave into the 2025-26 installed base, grid-compliance mandates spreading. Result: ~$8-9B by 2030.

Sensitivities in order. (1) AI rack shipment volumes and density mix; (2) attach rate on retrofit vs new-build; (3) $/Wh cell economics as the supply gap closes.

§A3. Market share and concentration estimates

Status: estimated where quoted. HSC/LIC cell market: Musashi ES estimated dominant share (widely reported ~50%+ of qualified capacity, exact number not published). MLCC market: Murata ~31%, Samsung EM ~20%, Taiyo Yuden ~13%, TDK ~10%, Yageo/Kemet ~9%, others ~17% (TrendForce/Yole compilations, 2024-25 basis, positions moved somewhat since). Al electrolytic market: Nippon Chemi-Con, Rubycon, Nichicon, Panasonic remain the top four, exact shares vary by source. Silicon capacitor market: Murata (via IPDiA), SEMCO, TSMC advanced packaging teams with a very small revenue base, structural shares not yet material.

§A4. Profit pool bands

Status: estimated. No source publishes gross margin by capacitor value-chain layer. Bands used in this piece (advanced materials 30-45%, cells 35-50%, modules 20-30%, shelves/systems 15-25% today, migrating toward services / cells / materials as OCP standardises) are the author's judgement, built from company-reported segment margins where disclosed, the observed supply/demand imbalance across the layers, and industrial analogues from the Li-ion materials chain where scarce upstream commoditised faster than qualified midstream. Directional.

§A5. Arrhenius lifetime scaling

Status: published rule of thumb. The 10°C halving heuristic (L = L₀ · 2^((T₀−T)/10)) is the standard capacitor lifetime model published across manufacturer application notes for Al electrolytic, EDLC and HSC categories (Nichicon, Panasonic, Musashi, Skeleton, Nippon Chemi-Con, Kemet). Absolute rated life at reference temperature varies (5,000h for a mid-tier Al electrolytic; 50,000-100,000h for a supercap at rated V; higher for a de-rated part), but the slope is broadly consistent. Real behaviour deviates at extremes: below 0°C ion mobility collapses, above 85°C the electrolyte itself degrades non-Arrhenius. Use the halving inside the middle of the operating band.

§A6. Cost per joule estimates

Status: estimated from vendor list pricing and procurement observations. The $/J values plotted are order-of-magnitude illustrations. Silicon capacitor: ~$5-50 per joule (device pricing $10-50, energy per device sub-mJ). MLCC: ~$1-20 per joule (device pricing $0.001-1, energy per device µJ range). Film: ~$0.05-0.5 per joule. Al electrolytic / polymer: ~$0.01-0.1 per joule. EDLC: ~$0.005-0.02 per joule. HSC/LIC: ~$0.003-0.008 per joule (cell-level at $8-15/Wh translates to ~$2-4/kJ). Li-ion: ~$0.0005-0.002 per joule at $100-200/kWh cell pricing. Every band spans an order of magnitude; treat the chart as positional.

§A7. Kuraray and materials chokepoint

Status: published position, estimated share. Kuraray publicly discloses activated carbon leadership for supercapacitor cathodes in its capacitor-carbon business unit. Precise global share of AI-qualified cathode carbon stays unpublished; industry estimates place Kuraray at leading share, with Nippon Kodoshi holding a comparable position in separator paper and Sumitomo Metal Mining in MLCC nickel paste. These are the "unpriced chokepoints" argument: narrower than the cell manufacturer concentration, structurally similar to the AMB Si₃N₄ layer in the wide-bandgap essay.

§A8. Other published figures used

• NVIDIA Vera Rubin storage step-up: ~20× vs GB300; NVIDIA disclosures (GTC 2025).
• GB300 power smoothing: capacitor-based smoothing built into the power shelf, cutting peak grid demand up to ~30%; NVIDIA disclosures + trade press.
• Kyber rack: ~600kW, 800VDC at rack inlet, ~750A busbar; NVIDIA + OCP Q1 2026 whitepaper.
• Rack power trajectory: GB200 ~120kW → GB300 ~145kW → VR NVL144 ~200kW → Kyber ~600kW → 1MW class 2028-29E; NVIDIA roadmap disclosures.
• 2026 AI-server supercapacitor demand vs supply: ~2-3x demand/supply, ~15-18M units of AI demand vs ~6.5M unit Musashi capacity; industry compilations, 2025-26.
• MLCC price increases: +15-35% at Murata effective April 2026, peers followed at various magnitudes; Murata, Taiyo Yuden, SEMCO, Yageo/Kemet company communications.
• Musashi ES ownership structure: LIC business inside Musashi Seimitsu (Honda-affiliated mid-cap auto-parts group); public filings.
• Maxwell / Tesla 2019: Tesla acquired Maxwell Technologies for ~$218M in 2019; Tesla SEC filings.

Related in the AI Power Chain

For readers who want the physics, cross-sections and failure modes behind every capacitor category discussed here, see the technical companion: The Capacitor Stack: Technical Companion.

Later parts of the series: The Wide-Bandgap Stack (Part II) covers SiC and GaN power semiconductors; its technical companion is The Wide-Bandgap Stack: Technical CompanionThe Thermal Stack (Part III) covers liquid cooling, with The Thermal Stack: Technical Companion for the physics. The Interconnect Stack (Part IV) covers transformers, switchgear, grain-oriented electrical steel and the grid equipment lead times that now gate the AI buildout.