TIME-STATE
As-of: 2026-09-03  Information cutoff: 2026-09-03  Anchor comp: Analog Devices–Empower Semiconductor, $1.5B (2026)
Subsequent developments: None disclosed at cutoff.

Exec brief

Ferric is the only publicly visible independent merchant integrated voltage regulator pure-play at comparable specification tier after Analog Devices closed the $1.5 billion acquisition of Empower Semiconductor on July 7, 2026. The broader power semiconductor field contains major captive, multi-phase, and analog approaches; Ferric occupies the specific merchant IVR pure-play slot that Empower held pre-acquisition. Ferric raised approximately $41 million in total private capital across a decade of DARPA-anchored and venture-funded rounds. Its flagship Fe1766 delivers 160 amperes from 35.5 square millimetres of silicon at 93 percent efficiency with an integrated thin-film magnetic inductor. The commercial evidence includes a June 17, 2025 collaboration with Marvell for pre-validated integrated voltage regulator power solutions targeting custom XPU platforms. The technology runs on a proprietary process co-developed with TSMC that dates back to 2019.

The underwriting question is not whether Ferric's technology works. The published Fe1766 specification and the Marvell collaboration establish that. The underwriting question is whether Ferric can scale from a single-flagship-product company with roughly $41 million total capital raised into a business worth a defensible fraction of the $1.5 billion Empower comp, and whether the standalone path clears against strategic alternatives.

This piece works through that underwriting question. It works as a companion to the broader IVR Stack canonical reference, which establishes the physics, architecture taxonomy, and category economics that Ferric competes inside.

01The value creation engine

Technology advantage → design-in → production qualification → shipment → units × ASP → revenue → gross margin → FCF → enterprise value.

Bull-case optionality attaches on top: TSMC IP licensing, defence-adjacent programs, strategic scarcity, and acquisition competition. Treat these as optional value drivers rather than base-case revenue.

Every claim in this piece maps onto one of the boxes in that chain. Ferric currently lands between the design-in and production-qualification stages; the Marvell collaboration is a design-in signal that has not yet converted into a production shipment at scale. Bull-case optionality (TSMC IP licensing) attaches on top of the base revenue engine.

Is Ferric a $500 million semiconductor company, a $1.5 billion strategic asset, or a $3 billion power-IP platform? Each rung and gate below shifts the probability toward one of these three.

02The company snapshot

Founded: approximately 2010. Headquarters: New York City, geographically distinct from the Silicon Valley cluster where most competing IVR IP developers sit. Founder and CEO: Noah Sturcken, PhD from Columbia University. Doctoral research at Columbia established the thin-film magnetic integration technology the company commercialised. Total private capital raised: approximately $41.1 million (CB Insights financials). Most recent round: $32 million Series C, closed late 2024 (Crunchbase profile). Investor base: DARPA, US Air Force, US Department of Defense, US Department of Energy across the early decade, plus New Science Ventures and other venture participants. Employee count: Ferric reports more than 50 employees. Independent as of September 2026: yes. No acquisition or IPO process disclosed.

P: All capital-raise data verifiable via CB Insights and Crunchbase. D: The company's capital efficiency (approximately $41M total raised versus Empower's $236M pre-acquisition) is consistent with a leaner cost structure and a business model that relies more on non-dilutive government funding and IP-licensing potential than on merchant chip revenue at scale.

03The technology: Fe1766 and the magnetic materials moat

Ferric's core intellectual property is a proprietary process for depositing thin-film ferromagnetic material directly on the silicon wafer during standard CMOS fabrication. The magnetic layer is deposited between the transistor layer and the interconnect stack, adding the inductor component to the same die as the regulator silicon rather than requiring a discrete inductor or a package-integrated ferrite module.

Flagship product: Fe1766, launched August 2025 (Ferric Fe1766 launch, BusinessWire).

SpecificationValue
Peak output current160 A
Silicon area35.5 mm²
Efficiency at rated loadup to 93%
Inductor integrationThin-film magnetic on wafer
Scaling architectureMulti-device parallel operation for kilowatt-class delivery
Target socketIn-package placement adjacent to compute die

The Fe1766 is the technical proof point that anchors every strategic question about Ferric. It demonstrates that Ferric can deliver high-current low-voltage regulation at industry-competitive efficiency, in a form factor that fits within the AI accelerator package envelope.

Fe1766 spec sheet: what Ferric ships todayFlagship integrated voltage regulator with wafer-level thin-film magnetic inductor.PEAK CURRENT160 Aper deviceSILICON AREA35.5 mm²at 4.5 A/mm²EFFICIENCY93%peak, integratedSCALING>10 kWvia parallel devicesPROCESSTSMC CMOSthin-film ferromagnetic BEOLSOCKETIn-packageadjacent to compute dieSource: Ferric Fe1766 launch, BusinessWire, August 2025.

Where Fe1766 lands mechanically. AI accelerator power delivery has split into two mechanical routes. Lateral power delivery (LPD) places the regulator on the package substrate around the compute and HBM dies. Substrate area is constrained by HBM footprint and interposer routing, and Ferric competes against multi-phase smart power stages from MPS, Infineon, and Renesas for that beachhead. Vertical power delivery (VPD) and backside power delivery (BPD) place the regulator or the passive inductor die directly under the compute die or interposer via 3D stacking, TSMC SoIC, or substrate bottom-side integration.

The LPD beachhead trade-off in numbers. Fe1766 delivers 4.5 A per mm² at 160 A output. Delivering 800 to 1,200 A into a single accelerator socket requires 6 to 8 Fe1766 devices paralleled, which consumes 200 to 280 mm² of substrate beachhead area. That footprint directly competes with HBM stacks and interposer routing on 2.5D CoWoS or EMIB packages. Whether Fe1766 wins the socket depends on whether the customer's PDN topology values the density improvement above HBM real estate loss.

The LPD beachhead trade-off: Fe1766 devices competing with HBM stacksDelivering 800-1,200 A into a single accelerator socket requires 6 to 8 parallel Fe1766 devices.ACCELERATOR PACKAGE (illustrative 2.5D CoWoS / EMIB)COMPUTE DIE800-1,200 A requiredHBMstackHBMstackFe1766Fe1766Fe1766Fe1766Fe1766Fe1766Fe1766Fe1766THE BEACHHEAD MATHPer-device area:35.5 mm²Current density:4.5 A/mm²Per-device current:160 ASocket target:800-1,200 ADevices required:6 to 8 Fe1766Beachhead area:200-280 mm²Competes with:HBM stacks + routingWhether Fe1766 wins the socket depends on whether the customer values density above HBM real estate.

The bridge to VPD. Whether Ferric's thin-film magnetic process tolerates backside silicon thinning, micro-bumping, or bottom-side substrate mounting determines whether Ferric is a transitional 2026-2027 LPD play or the default multi-generation substrate architecture for 2 kW+ accelerators. Fe1766's specification does not publicly confirm backside integration compatibility; the answer is technology-roadmap dependent.

The I²R math that anchors the Marvell claim. Marvell's public 85 percent transmission-loss reduction claim is straightforward I²R arithmetic. Stepping down from 48V or 12V to approximately 0.75V outside the package delivers current across inches of PCB copper at thousands of amperes. Stepping down inside the package cuts the current-carrying distance to millimetres. At 3,000 A, cutting the path length from 100 mm to 5 mm reduces the resistive loss by roughly 20x. Marvell's specific 85 percent claim assumes similar current levels and geometry comparisons; the exact reduction depends on the discrete VRM baseline being compared against.

The architectural duality: capacitive integration vs inductive integrationBoth attack the same problem from opposite ends of the passive-component stack.FERRICInductor-firstMECHANISMThin-film ferromagnetic BEOL deposited on the CMOSwafer during standard TSMC processing.SWITCHING FREQUENCYModerate: 10-40 MHzCAPACITOR APPROACHStandard integrated silicon and package capacitanceINDUCTOR APPROACHThin-film magnetic on-die, full flux loop on-chipDEFENSIBLE MOATMagnetic material process + circuit topology patentsEMPOWER (ADI)Capacitor-firstMECHANISMVery-high-frequency finFET switching (FinFast) plusproprietary integrated silicon capacitors (ECAP) thatdisplace external MLCCs.SWITCHING FREQUENCYVery high: 100-200 MHzCAPACITOR APPROACHECAP integrated silicon capacitor (proprietary)INDUCTOR APPROACHPackage-integrated ferrite / air-core, externalinductor volume minimisedDEFENSIBLE MOATSwitching architecture + capacitor integration process

The magnetics bottleneck. On-die thin-film ferromagnetic inductors face two physical constraints that any Ferric bull case has to address. First, thermal derating: AI accelerator packages run at 85 to 105 degrees C internal junction, and soft ferromagnetic thin films suffer permeability drop and reduced saturation flux density near those temperatures. Ferric's 93 percent efficiency figure is a peak specification; sustained-operation efficiency near thermal limits is the harder benchmark and not publicly disclosed at that granularity. Second, transient response at high slew rates: current-generation AI workloads impose very high current-slew rates during bursty inference and transformer context shifts (published figures in the kiloamperes-per-microsecond range, with the exact rate depending on workload and process node). Ferric's integrated inductor eliminates the loop inductance that discrete-inductor solutions carry, but the trade-off is reduced secondary decoupling capacitance headroom compared to Empower's silicon-capacitor approach.

The architectural duality: capacitive integration versus inductive integration. Empower's approach collapses passive bulk capacitance by accelerating the control loop through very-high-frequency finFET-based switching (FinFast at approximately 100 to 200 MHz) paired with integrated silicon capacitors that displace external MLCCs. Ferric's approach collapses passive volume by depositing the magnetic flux path directly on the die during BEOL processing. Empower minimises required capacitance. Ferric minimises required inductor volume. That framing explains why ADI bought Empower (the capacitive-integration platform reached commercial-scale first) and why Ferric occupies the sole remaining merchant pole on inductive integration. Both integration paths can coexist in the same accelerator socket targeting different SKU tiers; which one dominates the socket depends on the customer's PDN topology, switching frequency, and thermal envelope.

The magnetic moat. In The IVR Stack the essay establishes that Ferric's differentiated bet is on magnetic materials integration, contrasted with Empower's bet on switching architecture and integrated silicon capacitors. Ferric's moat rests on the proposition that switching devices commoditise faster than magnetic material integration. If that proposition holds, Ferric's process advantage compounds; competitors have to invest years in developing an equivalent thin-film magnetics process before matching Ferric's Fe1766-class specification.

P: Fe1766 specifications are published on the Ferric technology page and in the August 2025 launch announcement. D: The magnetic-materials-first moat argument is inferable from Ferric's public technology positioning and TSMC integration language. I: Whether magnetic material integration is a durably defensible moat depends on manufacturing yield, the pace at which competitors can develop analog processes, and whether alternative switching architectures (Empower's finFET-based FinFast, potential GaN low-voltage approaches) render the magnetic advantage economically irrelevant. The medium-term read favours coexistence; the long-term read is scenario-dependent.

04Customer economic value: Gate 0

Does Fe1766 create economic value that Ferric can capture as ASP?

A hyperscaler ASIC designer or Marvell XPU designer buys the system-level composite that 93 percent conversion efficiency unlocks:

  • Additional compute performance per package thermal envelope
  • Reduced board and package area consumed by discrete regulator components
  • Reduced system BOM cost via component consolidation
  • Lower junction temperature and consequently higher sustained clock frequency
  • Faster transient response supporting more aggressive power-management policies
  • Reduced PCB layer count from lower current density in the socket

Customer value ceiling does not equal Ferric ASP. Public evidence is insufficient to establish Ferric ASP directly, and ASP should remain an underwriting variable rather than a derived estimate. The composite economic value per accelerator runs in the low thousands of dollars at current AI accelerator ASPs (Nvidia B200-class parts at approximately $40,000 street price; Marvell custom XPUs at similar scale).

Illustrative ASP sensitivity, not a forecastIf Ferric captured 5 to 15 percent of the composite economic value as ASP, the per-device figure would fall between $200 and $800. The range depends on customer negotiation and volume tier and cannot be treated as a public data point. Ferric ASP remains an underwriting variable until customer or company evidence establishes actual pricing.

The BOM substitution stress test. A legacy multi-phase VRM solution (16 to 20 phases of smart power stages plus a digital multi-phase controller plus discrete inductors from MPS, Infineon, or Renesas) costs approximately $40 to $80 per socket. For an OEM or hyperscaler to accept a Ferric array at $300 to $500 per socket (multiple Fe1766s ganged together to deliver 800 A to 1,200 A), Ferric has to justify a 4x to 6x BOM cost premium through TCO savings that arrive at the system level rather than at the component level.

The illustrative TCO components add up:

  • PCB layer reduction. Eliminating high-current 0.7 V socket pins allows PCB layer count to drop from roughly 28-32 layers to 18-22 layers. Cost saving: approximately $150 to $300 per board.
  • I²R loss reduction. Marvell's 85 percent transmission-loss reduction claim translates to approximately 40 to 70 watts of package power saved per socket. At approximately $3 per watt-year of hyperscaler TCO, that yields roughly $120 to $210 per socket per year in recovered economic value.
  • Package area recovered. Substrate area released from discrete VRMs becomes available for additional HBM stacks or larger compute die. Difficult to price in isolation; captured through customer platform design.
  • Sustained clock frequency. Lower junction temperature enables higher sustained clocks, which translates to more effective compute per accelerator hour. Priced through hyperscaler workload economics.

The composite TCO ceiling justifies the 4x to 6x BOM premium if all four categories materialise together. Ferric cannot be underwritten as component BOM substitution. It has to be underwritten as an enabler of accelerator compute yield and package density.

P: Composite value dimensions are inferable from public AI accelerator power delivery whitepapers and Marvell's own PIVR claim of 2× current density and up to 85% lower transmission losses.
D: Ferric per-device ASP in the low hundreds is consistent with the composite value calculation.
I: Whether Ferric captures the upper or lower end of the 5-15% range depends on competitive tension at the design-win stage and on Ferric's negotiating position at qualification.

05Time to commercial validation

Semiconductor commercialisation runs on a specific calendar. Ferric's own trajectory falls inside a plausible three-year window.

  • 2026: technology and financing. Fe1766 shipping to design partners. Series D expected within twelve months.
  • 2027: design qualification. First production qualifications on named platforms. Marvell XPU 2027 generation carries the first observable market signal.
  • 2028: production ramp. First material chip revenue. Multi-platform adoption becomes visible in customer disclosures.
  • 2029: multi-platform validation. Ferric silicon shipping in two or more named hyperscaler XPU platforms. Licensing conversations mature or fail to mature.

The 2029 valuation reflects the evidence accumulated across those four years. Capitalising a 2029 Bull case into a 2026 company valuation would systematically overprice the asset today. The specific evidence-conditioned states below assume the appropriate temporal discount.

06The provenance: Columbia, DARPA, and TSMC

The technology provenance carries three anchors that most private semiconductor companies at Ferric's stage do not have.

Anchor 1: Columbia University academic origin. Noah Sturcken's doctoral research established the thin-film magnetic inductor integration technology. The academic origin gives Ferric a specific position in the university-spinoff category that carries credibility with foundry partners and enterprise customers who historically distrust venture-backed power semiconductor startups. It is a similar signal to what the DG Matrix company inherits from the NC State FREEDM Systems Center. The TSMC relationship creates the possibility of an IP-licensing channel into TSMC customers. Public evidence does not establish material royalty economics today.

Anchor 2: Non-dilutive government funding with documented programs. DARPA, US Air Force, US Department of Defense, and US Department of Energy across the pre-Series C period. Non-dilutive government capital funded Ferric's early technology development and produced documented defence-oriented programs. Public SBIR records identify a US Air Force Phase II program for Ferric PVR qualification, describing Ferric PVRs incorporated into an ACT (Automated Compact Transportable) module design. The extent to which these programs convert into recurring commercial defence revenue is not publicly disclosed. Treat the government-funding record as documented technology validation and program participation rather than as a projected revenue stream.

Anchor 3: TSMC process integration since 2019. Ferric's manufacturing and integration relationship with TSMC dates back to public co-presentations at PwrPak 2019, where Sturcken presented alongside TSMC's Vice President of R&D. The relationship has extended across multiple TSMC process nodes since then, and TSMC positions Ferric IP within its own customer offerings. This gives Ferric a channel dimension that a pure chip vendor does not have: Ferric could potentially license its inductor libraries and IVR IP to TSMC customers for direct integration onto their processor dies. Public evidence does not confirm the commercial terms, exclusivity, or royalty economics of any such arrangement.

P: All three anchors verifiable via Ferric technology page, Ferric news, and PSMA PwrPak 2019 program. D: The three anchors together produce a business model that has both merchant-chip and IP-licensing dimensions. Empower does not have the IP-licensing dimension in the same way. I: Provenance carries commercial weight only if the design-win pipeline materialises. Provenance without conversion produces a well-credentialed private company rather than a valuable business.

07The commercial evidence: Marvell and the visible pipeline

The commercialisation story does not start with Fe1766. Ferric shipped Fe1736 and Fe1728 evaluation units to alpha customers in July 2023 ([Ferric news archive](https://www.ferric.com/news)). Evaluation shipments are not production revenue, but they establish that Ferric had a multi-year commercial-development runway ahead of the Fe1766 launch. That runway matters for how quickly the Marvell relationship can transition from collaboration to production design-in. The strongest publicly-disclosed commercial engagement is with Marvell.

Marvell collaboration announced June 17, 2025 (Ferric news). The engagement targets pre-validated IVR power solutions for Marvell's custom XPU platforms. Marvell's custom XPU program serves multiple hyperscaler ASIC customers, so a Marvell design win potentially reaches multiple end customers via the Marvell silicon.

The Marvell relationship is the central near-term commercial data point. The reason the relationship carries interpretive weight beyond a simple design win is that Empower announced its own Marvell collaboration in early 2026, and ADI subsequently acquired Empower in May-July 2026. That timing sequence produces three possible readings of the Marvell pipeline.

Reading A: Marvell is multi-sourcing IVR at the SKU level. Ferric wins one SKU family, Empower (now ADI) wins another. Both vendors continue to develop the XPU pipeline in parallel. Reading B: Marvell's Ferric engagement was superseded by the Empower engagement, and Ferric's pipeline visibility at Marvell has been diminished by the ADI acquisition. Reading C: Marvell is deliberately keeping both vendors on the roadmap to preserve pricing leverage and technology optionality across generations.

The public evidence does not distinguish among the three. Marvell's own PIVR announcement is architecture-agnostic, so it does not name a specific IVR vendor. The reading matters materially for Ferric's valuation because Reading A supports a Base case, Reading B pushes toward the Bear case, and Reading C supports a Base-to-Bull outcome depending on how the roadmap evolves.

Defence-adjacent pipeline. Ferric's DARPA, US Air Force, US Department of Defense, and US Department of Energy relationships imply embedded design engagements in classified or export-controlled compute programs. Named customers are not publicly disclosed. The existence of the pipeline is a verifiable analytical inference from the funding source list, not from named customer announcements.

Other visible engagements. Ferric's website and press coverage do not identify additional named commercial customers at the specification level. This is normal for a semiconductor company at Ferric's stage; SKU-level customer names are typically confidential until product shipment.

P: Marvell collaboration announcement dated June 17, 2025. P: Government funding source list on Ferric's technology and news pages. D: Three readings of the Marvell pipeline sequence are internally consistent with the public evidence. I: The Reading A / B / C distinction is the single largest source of Ferric standalone-valuation dispersion in the twelve months after this piece publishes.

08What is not publicly disclosed

Every underwriting statement in this piece runs against the specific limits of public evidence. The private-company reality is that most of the numbers that would let a security-level investor make a final decision are not public.

MetricPublic evidence
FY2024 revenueNot disclosed
FY2025 revenueNot disclosed
Gross marginNot disclosed
Cash balanceNot disclosed
Burn rateNot disclosed
Current valuation (post Series C)Not disclosed
Customer concentrationNot disclosed
Ferric ASPNot disclosed
Production volumesNot disclosed
Fe1766 published specificationYes (160 A, 35.5 mm², 93% efficiency)
Total private capital raisedYes (~$41.1M)
Series C size and dateYes ($32M, December 2024)
Named strategic customerYes (Marvell collaboration announced June 2025)

This is strategic asset underwriting rather than security-level company underwriting. A private investor cannot decide whether to buy shares without the missing metrics above. What this piece provides is the framework and evidence-conditioned states that map the eventual disclosure into a valuation read.

09The Empower comp and what $1.5 billion means for Ferric

Analog Devices announced the acquisition of Empower Semiconductor on May 19, 2026, and completed it on July 7, 2026 for $1.5 billion in cash (ADI completion release).

Empower's capital-to-price ratio: approximately $236 million total private capital raised versus $1.5 billion enterprise value. Roughly 6.4× MOIC on total invested capital across the roughly ten-year build. Empower's Series H investors from September 2025 received a fast return; earlier-stage investors received strong multiples.

Applied to Ferric, the comp produces six anchor observations.

Observation 1: Category validation. A major analog semiconductor company paid $1.5 billion for an IVR technology platform. That establishes revealed strategic willingness to pay for a credible IVR position.

Observation 2: Revealed scarcity value. ADI's decision to buy rather than build internally implies that ADI valued time-to-market plus proven design capability above the alternative of multi-year organic development. The strategic scarcity premium exists for any independent IVR asset that remains commercially credible.

Observation 3: Capital raised is not a valuation driver. Empower's capital-in ($236M) versus Ferric's ($41M) produces a suggestive ratio, but capital raised does not have a mechanical relationship to enterprise value. The ratio is a capital-efficiency reference only. Ferric reaching a proportionate price requires demonstrating a proportionate commercial trajectory.

Observation 4: The transaction anchors category valuation, not Ferric valuation. The right question is not "Ferric is worth X percent of Empower." The right question is: how much of the revealed $1.5B strategic willingness to pay has Ferric earned through technology, qualification, design wins, production, and strategic scarcity?

Empower's $1.5B is a strategic transaction comp rather than a clean financial-market comp. ADI's preliminary purchase-price allocation records roughly $1.0 billion in goodwill and $0.6 billion in technology-related intangible assets. The transaction price is a composite of strategic portfolio value, technology, customer relationships, integration synergies, and future platform economics. The stronger Ferric bear argument is not "Ferric is not as good as Empower." It is: how much of Empower's strategic scarcity was specific to ADI's power portfolio, and how much attaches to the underlying merchant-IVR asset that another acquirer would also value? That distinguishes the portion of the comp that transfers to Ferric from the portion that was ADI-idiosyncratic.

Observation 5: Why ADI paid the scarcity premium. ADI paid $1.5 billion for Empower not because Empower had proven $250 million in annual revenue, but because Empower represented a defensible position in the merchant IVR socket that would have taken multiple years and multiple hundreds of millions of R&D dollars to replicate internally. Ferric occupies a similar strategic scarcity position after the ADI-Empower transaction. It appears to be the most visible remaining independent merchant IVR pure-play at this specification tier.

Observation 6: Three tiers of strategic buyer, each with different pricing logic.

  • Tier 1. Direct power-semiconductor logic. Renesas, Texas Instruments, Monolithic Power Systems, Infineon, Onsemi. Each can integrate Ferric IVR into an existing power portfolio and monetise through their established analog and mixed-signal channels. Their pricing anchor is the ADI-Empower comp, adjusted for size and channel value.
  • Tier 2. Custom-silicon vertical integration. Marvell, Qualcomm. Their incentive is to internalise IVR IP into their own accelerator or custom-XPU platforms. Their pricing anchor is the internal cost avoided by not building the technology from scratch, plus a scarcity premium.
  • Tier 3. Ecosystem control. Hyperscalers (Google, Amazon, Meta, Microsoft) plus TSMC direct. Their incentive is to secure supply and architecture control for a proprietary accelerator roadmap. Their pricing logic is not semiconductor economics; it is optionality on future compute architecture. The transaction structure would likely include supply commitments rather than a straight cash deal.

The concentration of the acquirer set across three tiers is what makes an eventual auction plausible. A well-run process should surface at least one bidder from Tier 1 and one from either Tier 2 or Tier 3.

Named acquirer scorecard. Four candidates warrant explicit imperative-and-friction analysis.

Potential acquirerStrategic imperativeFriction against acquiringLikelihood
MarvellVertically integrate custom XPU power delivery. Differentiate ASIC platform against Broadcom and Alchip.Prefers merchant neutrality across suppliers. Acquiring Ferric might push competitor ASIC customers away.High
BroadcomClose the power efficiency gap on custom hyperscaler XPUs (Google TPU, Meta MTIA).Historically avoids early pre-revenue and pre-qualification technology. Prefers high-margin cash-generative franchises.Medium-Low
Texas Instruments / InfineonDefensive hedge against IVR cannibalising discrete multi-phase DrMOS and converter franchises.Cultural friction with fabless deep-tech and proprietary TSMC BEOL dependency.Medium
NvidiaIn-house package power density optimisation for future 2 kW+ rack architectures (post-Rubin / Kyoto).Can exert immense customer leverage without buying the asset. May push TSMC to standardise the interface.Medium-Low
Analog DevicesConsolidate merchant IVR by uniting Empower's capacitor-integration platform with Ferric's inductor-integration platform.Regulatory scrutiny post-Empower. Post-acquisition integration bandwidth and write-down exposure.Low

P: ADI-Empower deal terms verifiable via ADI announcement release and ADI completion release. D: The capital-to-price ratio math is direct arithmetic. I: The strategic scarcity premium is the load-bearing analytical claim. If merchant IVR does not sustain as a category, the scarcity premium collapses. If merchant IVR sustains as a category, the scarcity premium applies to Ferric with force.

10The underwriting decision tree

Six gates to think through, in the order they matter for a standalone Ferric bet.

GateQuestionCurrent readVerdict
1Is the merchant IVR category durable?Investable through 2027-2028; longer-term scenario-dependentFavourable
2Does Ferric's magnetic-materials moat hold as switching devices commoditise?Moat holds at Fe1766 tier; extension to next-generation specs unprovenUndecided
3Does the Marvell relationship convert into shipping revenue?Too early; watch Marvell 2027 XPU roadmap disclosuresUndecided
4Does Ferric capture value without shipping silicon? (TSMC IP-economics)Unproven; single largest source of Bull-case valuation dispersionUndecided
5Are the defence-adjacent design engagements commercially material?Partially disclosed; treat as validation + optionality, not recurring revenueUnfavourable
6Is the acquirer set concentrated enough to price the asset?Concentrated but plural; auction dynamics plausible with well-run processFavourable

Gate 1: Is the merchant IVR category durable? The IVR Stack canonical piece establishes seven falsifiers. A cleaner test than a mechanical falsifier count: the category remains investable if at least one of the following holds through 2028:

  • Accelerator power draw continues rising at multi-kiloampere core-rail currents
  • Final-stage PCB and package parasitics remain economically material at that current density
  • Package-level conversion retains a measurable performance advantage over board-level regulation
  • Workload silicon designers remain willing to allocate package area and thermal budget to power delivery
  • Merchant vendors retain access to custom silicon and hyperscaler ASIC customers

The category needs at least one of the five to hold; below that it compresses. From one upward, the merchant slice widens with each additional condition that holds, reaching full category expansion at five of five.

Current read: at least three of the five hold through 2027-2028. Longer-term is scenario-dependent.

Gate 2: Does Ferric's magnetic-materials moat hold as switching devices commoditise? Ferric's bet is that the thin-film ferromagnetic integration is harder to replicate than the switching architecture. Empower's bet is the opposite. The technical evidence favours neither definitively. What matters commercially is whether the moat translates into design-win exclusivity.

Current read: moat holds at the Fe1766 specification tier. Whether it extends to next-generation specs (higher current, higher frequency, wider voltage range) is unproven.

Gate 3: Does the Marvell relationship convert into shipping revenue? The June 2025 collaboration announcement is a leading commercial indicator. Whether it becomes a shipping SKU in a Marvell XPU product at scale determines whether Ferric has a validated merchant business or a technology demonstration with a strategic partner.

Current read: too early to determine. Watch Marvell's 2027 XPU roadmap disclosures.

Gate 4: Does Ferric capture value without shipping silicon? This is a harder question than "does TSMC licensing produce royalty revenue." The harder version asks: does Ferric possess contractual IP economics that survive even when Ferric does not sell the physical regulator? There is a material difference between "TSMC enables Ferric technology" and "TSMC customers pay Ferric for Ferric technology." The current piece treats the second as the Bull case. It is a demanding case that requires public disclosure of a specific royalty structure between Ferric and a TSMC customer.

Current read: unproven and swing-factor material. This is the single largest source of Bull-case valuation dispersion.

Gate 5: Are the defence-adjacent design engagements commercially material? DARPA and Department of Defense contracts historically produce technology validation but modest commercial revenue at scale. If Ferric's defence-adjacent pipeline includes shipping programs at material volume, that provides a revenue floor. If it is primarily research contracts, the commercial revenue implication is small.

Current read: partially disclosed. No defensible revenue floor should be assigned to the defence pipeline until a shipping program, specific contract value, or recurring production engagement is publicly evidenced. Treat defence funding as technology validation, non-dilutive capital, and optionality rather than as a recurring revenue line.

Gate 6: Is the acquirer set concentrated enough to price the asset? For a strategic acquisition, at least two credible bidders are needed to establish auction dynamics. The candidate list (Renesas, TI, MPS, Infineon, Onsemi, Marvell, Qualcomm) contains multiple credible names. Whether any two bid simultaneously determines the transaction price.

Current read: the acquirer set is concentrated but plural. Auction dynamics are plausible if the process is well-run.

11Three vetoes

Beyond the three vetoes below, three additional technical tripwires would invalidate the Bull thesis specifically without necessarily killing the standalone company.

  1. High thermal derating of magnetic permeability. Ferric's thin-film ferromagnetic inductor faces saturation flux density (Bsat) degradation and permeability drop at junction temperatures above roughly 95 degrees C. AI accelerator packages routinely run above that threshold. If sustained-operation efficiency drops materially versus the peak 93 percent specification, the customer value proposition compresses.
  2. BEOL yield drag at commercial volume. Thin-film magnetic deposition in the CMOS BEOL is a specialty process. If yield in commercial-scale production runs falls short of standard CMOS BEOL yield by more than a few points, the effective die cost rises above Ferric's competitive envelope.
  3. Hyperscalers settling for dual-stage intermediate architectures. If hyperscaler custom silicon programs choose a two-stage 48V-to-1.8V intermediate bus using discrete multi-phase regulators before committing to in-package IVR, the merchant IVR socket at the hyperscaler tier shrinks. Ferric survives at the Marvell XPU tier but loses the multi-platform Bull case.

Each of these tripwires is a technical outcome rather than a strategic decision. All three can be monitored through customer disclosures, foundry technology briefings, and Ferric's own product roadmap.

Any single one of these vetoes kills the standalone Ferric bet independent of the six gates.

Veto 1: Ferric fails to demonstrate production qualification and commercial conversion. Fe1766 stays in evaluation and early design-in stage beyond mid-2027 without a publicly named production qualification. Merchant IVR requires customer PPAP, qualification, and volume shipment, not evaluation units. If Ferric cannot transition from evaluation to production within the 2027 window that Marvell's next-generation XPU cycle establishes, the strategic scarcity premium collapses because the buyer's opportunity to lock in Ferric before category consolidation closes.

Veto 2: Loss of process portability or foundry leverage. The danger is not simply that TSMC works with a different IVR vendor. Ferric could survive TSMC diversification if another foundry can reproduce the thin-film magnetic process, if Ferric owns portable circuit and topology IP, if customers value the technology independent of foundry origin, or if Ferric's merchant silicon business works without the licensing channel. The actual veto: Ferric's differentiated economics depend on a TSMC-specific relationship that Ferric cannot control or replicate elsewhere. If that dependency proves absolute and TSMC standardises thin-film magnetic BEOL PDKs for its Open Innovation Platform, Ferric's moat migrates from foundry-material process to circuit topology and multi-phase current sharing patents. Whether the patent portfolio holds standalone value at that point is a separate underwriting question.

Veto 3: Financing or runway failure. Ferric cannot raise sufficient capital to reach the next commercially material qualification milestone without either materially punitive dilution or forced strategic dependence. The milestone that matters: production qualification of Fe1766-class silicon in a shipping design win. A Series D that funds Ferric through that milestone at a competitive valuation validates the standalone path. A Series D that requires strategic acquisition co-terms, or a delayed Series D that forces distressed pricing, breaks the standalone thesis regardless of the underlying technology.

12Commercial evidence to enterprise value

The commercial progression from evaluation through platform dependence has seven rungs. Six enterprise-value brackets map onto the progression, each earned by specific public evidence. This framework mirrors the one in the IVR Stack canonical piece and adds specific triggers per bracket.

Commercial progression: rungs, EV brackets, and evidence per bracketRung colours match the EV brackets. Ferric currently sits between rung 2 and rung 3.1EvaluationEV BRACKET(below floor)EVIDENCESamples in customerlabs; no fundeddesign engagement2Design engagementEV BRACKET~$200MEVIDENCENamed customer collab(Marvell); jointengineering underwayF3Design-inEV BRACKET~$500MEVIDENCECustomer commits SKUor platform; Marvelldesign-in confirmed;1 additional partner4QualificationEV BRACKET~$1.0BEVIDENCEPPAP passed ontarget production part;ship-window locked5Production winEV BRACKET~$1.0BEVIDENCEFerric in shippingproduct; first materialchip revenue reported6Volume shipmentEV BRACKET~$1.5BEVIDENCECommercial volume;revenue tracking to$1.26B Y5 target;2 bidders active7PlatformEV BRACKET$2.5B → $4.0B+EVIDENCERoadmap-embedded:multi-customer orTSMC IP-licensingTECHNOLOGY FLOORFe1766 continues shipping. Funding secured throughthe next 18 months. No production revenue disclosed.Bear-anchored.STRATEGICTECHNOLOGY ASSETProduction qualificationpassed on Fe1766 orsuccessor. Marvelldesign-in confirmed +1 additional namedpartner. No materialrevenue yet.COMMERCIALLY VALIDATEDMultiple production design wins disclosed.First material chip revenue reported.Marvell relationship confirmed at SKU level;2nd hyperscaler-adjacent customer named.ADI/EMPOWERPARITYMaterial productionrevenue tracking to$1.26B Y5 target;scarcity premiumactivated; 2 crediblestrategic biddersactive.MULTI-PLATFORMADOPTIONFerric silicon in>2 named hyperscalerXPUs; licensingtalks disclosed.INFRASTRUCTURE/ IP LAYERTSMC royalty licensedisclosed; Ferric IPon hyperscaler customdie by TSMC decision.PRODUCTION IS THE $1B+ GATEDesign wins create option value.Production revenue converts option into enterprise value.IVR-category importance alone earns neither.$4.0B+ IS A BUSINESS-MODEL SHIFTMulti-customer at $2.5B keeps Ferric a scaled merchant.Infrastructure/IP at $4.0B+ shifts Ferric into IP-licensing onsilicon that other companies make; a different business model.F = Ferric today (design engagement with Marvell; design-in publicly unclear)Rung colour matches the EV bracket it unlocks. Zones stack top-down: rung header, EV bracket amount, per-rung evidence, then the named state that bracket represents.

Rung 2 to rung 3 is where Ferric converts a technology asset into a strategic one. The bigger step is rung 5 to rung 6: the EV bracket moves from $1.0B to $1.5B and the strategic scarcity premium that anchored the ADI-Empower transaction activates. At rung 7, the framework splits into two flavours. Multi-customer adoption clears $2.5B; TSMC-integrated IP-layer economics clears $4.0B+ and requires evidence of a specific royalty structure that has not yet been publicly disclosed.

Every EV bracket above the ~$200M floor requires specific public evidence. The transitions between rungs are step changes: named collaboration, SKU-level design-in, production qualification, volume shipment, and platform dependence each represent qualitatively different states of commercial maturity. The reader can track each transition as the evidence lands.

Evidence-conditioning table. The scenario read updates as specific evidence lands.

Evidence achievedBracket shift
Fe1766 technology demonstration only (current state)Bear-anchored; lower bound holds
Multiple qualified production designs (beyond Marvell)Bear to Base transition
Marvell production SKU deployment disclosedBase-anchored
Hyperscaler XPU design-in named publiclyBase to Bull transition; strategic-scarcity premium triggers
TSMC embedded IP licensing revenue disclosedBull-anchored; semiconductor-IP multiple applies

Reverse-underwrite reference. The formula: Required year-5 revenue = Purchase Price × (1 + IRR)^n ÷ Terminal Multiple ÷ Gross Margin. For $1.5 billion at 15% IRR over 5 years, 4× forward gross-profit terminal multiple, and 60% gross margin:

  • Terminal enterprise value required: $1.5B × (1.15)^5 = $3.02B
  • Gross profit required: $3.02B ÷ 4 = $755M
  • Year-5 revenue required: $755M ÷ 0.60 = ~$1.26 billion

Applying the same formula across acquisition prices produces a reference table for what year-five revenue each price implies.

Acquisition priceTerminal EV at 15% IRR / 5 yearsGross profit at 4× multipleYear-5 revenue at 60% GM
$300M$603M$151M~$252M
$500M$1.006B$251M~$419M
$750M$1.509B$377M~$629M
$1.0B$2.011B$503M~$838M
$1.5B$3.017B$755M~$1.26B
$2.0B$4.023B$1.006B~$1.68B

Ferric clears $1 billion enterprise value on one of two paths. Either the company builds a hundreds-of-millions-to-billion-dollar revenue business, or it commands a different multiple through IP or strategic economics. IVR-category importance alone is insufficient.

Reverse underwriting: what year-5 revenue does each acquisition price require?15% IRR over 5 years · 4× forward gross-profit terminal multiple · 60% gross margin.$252M$300Macquisition price$419M$500Macquisition price$629M$750Macquisition price$838M$1000Macquisition price$1257M$1500Macquisition price$1676M$2000Macquisition priceEmpower compYear-5 revenue required, $MTerminal-value-only model. Excludes interim cash flows and integration synergies. Ferric cannot clear $1B EV because IVR is important; it clears $1B only if it becomes a hundreds-of-millions-to-billion-dollar revenue business or commands a different multiple.

13The watch list, Q4 2026 through 2027

Ten public signals to track. The scenario read updates each quarter as these land or fail to land.

  1. Ferric Series D announcement. A Series D at a valuation materially above the December 2024 Series C benchmark constitutes positive third-party price discovery. A flat or down round indicates that strategic scarcity has not yet translated into investor willingness to underwrite commercial conversion.
  2. Marvell public commentary on multi-source IVR at 2027 XPU generation. Direct confirmation of Reading A above shifts the read toward the Base case.
  3. Any Marvell XPU shipment publicly disclosed with a named IVR vendor. Distinguishes Reading A from Reading B.
  4. Hyperscaler custom silicon roadmap disclosures. Google TPU, Amazon Trainium, Microsoft Maia, Meta MTIA. Any named IVR sourcing decision is a major signal.
  5. TSMC Technology Symposium content on IVR ecosystem. Any named partner naming shifts the licensing scenario read.
  6. Analog Devices earnings commentary on Empower integration. Rate of design-win capture, revenue trajectory, and any competitive-response language.
  7. Renesas, TI, MPS, or Infineon acquisition activity in the IVR category. Any similar transaction validates or challenges the ADI-Empower comp.
  8. Ferric product roadmap disclosures. Next-generation Fe17-series products, GaN-integrated variants, higher-current SKUs.
  9. Ferric CEO Noah Sturcken conference appearances and technical presentations. Direction of technical narrative changes the read.
  10. Any Nvidia Rubin Ultra IVR sourcing disclosure. If Nvidia's own architecture confirms merchant IVR sourcing, the category scarcity value rises.
  11. Production qualification evidence. Not collaboration announcements. Actual PPAP, qualification, production release, or volume shipment on a named customer platform.
  12. ASP and unit economics evidence. Any indication of per-device ASP, gross margin, customer concentration, or manufacturing economics from Ferric or a customer disclosure.
  13. Foundry dependence disclosure. Does Ferric remain dependent on TSMC for the differentiated thin-film magnetic process? Both moat and dependency; the answer changes the underwriting.

14The investment call

For a private-market investor, Ferric is the accessible IVR pure-play post-ADI-Empower. The Series C at $32 million in December 2024 is now approximately two years old. A Series D at scale in the next twelve months is plausible and would establish the second public data point on the IVR category (after ADI-Empower). A Series D above the prior financing benchmark that also lands alongside production qualification would constitute strong third-party validation. A high-priced financing without commercial conversion would not. The signal is price multiplied by evidence. Price alone is insufficient.

For a strategic acquirer, Ferric is the most visible remaining independent merchant IVR IP acquisition opportunity at a defensible price before the category enters full consolidation. The five named candidate acquirers (Renesas, TI, MPS, Infineon, Marvell) each have a specific strategic angle. Any single acquirer pre-empting a Series D process would establish the transaction anchor.

For a public-market investor, direct Ferric exposure is not available. The most correlated public exposure is Analog Devices (as the IVR incumbent), plus Marvell (as the AI accelerator customer). Watch ADI's earnings commentary for design-win capture rate and Marvell's earnings commentary for IVR sourcing strategy. Both surface the underlying category dynamics that determine Ferric's outcome.

The single-sentence version: Ferric is an option on the monetisation of merchant IVR scarcity.

Three nested bets, in order of dependency.

  1. Bet 1: IVR becomes structurally necessary in AI accelerator power delivery.
  2. Bet 2: Merchant IVR (as distinct from captive hyperscaler silicon) remains strategically valuable.
  3. Bet 3: Ferric captures enough of that value to become a $1B+ strategic asset.

Plus one option layered on top: Ferric captures IP-licensing economics and escapes component-company multiples.

Three nested bets plus an optionality layerEach bet depends on the previous one clearing. The option attaches only if all three land.Bet 1PHYSICSIVR becomes structurally necessary in AI accelerator power deliveryBet 2CATEGORYMerchant IVR remains strategically valuable (versus captive hyperscaler silicon)Bet 3COMPANYFerric captures enough of that value to become a $1B+ strategic asset+ OPTIONFerric captures IP-licensing economics and escapes component-company multiples.

Three brackets, each with a distinct valuation architecture rather than a single-multiple output:

  • Bear ($400 to $700 million): niche merchant revenue plus defence-program floor, valued at a conventional semiconductor-hardware multiple (roughly 3 to 5× forward gross profit).
  • Base ($1.0 to $1.8 billion): scaled merchant IVR revenue plus strategic scarcity, valued at an Empower-comparable strategic multiple where the acquirer prices scarcity above underlying financial performance.
  • Bull ($2.5 billion+): royalty-bearing IP plus merchant revenue, valued at a semiconductor-IP multiple (15 to 25× revenue on the licensing stream). Requires TSMC IP-licensing economics to materialise.

Each bracket therefore rests on a different economic engine, not simply on a different assumption about how strong the same engine is.

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Sources cited