AI power semiconductors
The reference on the semiconductor devices at the point-of-load and along the AI power delivery chain: silicon carbide (SiC) and gallium nitride (GaN) wide-bandgap devices, direct-to-pin factorised power, and the vendor landscape from utility-scale SST silicon down to sub-1V GPU point-of-load.
01Direct answer
02Key concepts
03Structural decomposition
The AI power semiconductor stack (by layer)
- Layer 1-2 (MV). SiC devices in utility-scale converters + solid-state transformers
- Layer 3 (LV distribution). SiC/GaN hybrids in DC-DC converters + power supplies
- Layer 4 (rack conversion). GaN + SiC hybrid for 800V-to-48V; Delta, Advanced Energy, Bel Power
- Layer 5 (in-rack). GaN devices in 48V busbar management + rack PDU
- Layer 6 (POL). Silicon POL + Vicor factorised power + Navitas direct-to-pin
04Deep-dive research
- The Wide-Bandgap StackSiC + GaN in AI power infrastructure.
- WBG technical companionDie + package + supply chain deep-dive.
- The On-Package Delivery StackSub-1V power delivery + silicon interposer.
- Vicor direct-to-pinFactorised power architecture at Layer 6.
- Navitas + EPC GaNGaN pure-plays for AI power.
- Wolfspeed SiC retrospectiveThe SiC pure-play's 10-year journey + restructuring.
06Commercial + investment implications
Commercial + investment angles
SiC + GaN vendors are attractive PE acquisition targets given consolidation activity. Wolfspeed's restructuring is the reference cautionary case for pure-play capital intensity. Broad-portfolio incumbents (Infineon, TI, ADI, MPS) offer more diversified exposure. See Wolfspeed retrospective for the specific cautionary lens.
07Frequently asked
SiC vs GaN: what is the practical difference?
SiC handles higher voltages (up to MV) and higher power; used in solid-state transformers, EV traction, grid infrastructure. GaN switches faster at lower voltages (typically <=650V); used in rack-level DC-DC and POL. They are complementary, not competing, in most AI power applications.
Is Vicor's direct-to-pin approach going to displace the 48V intermediate bus?
Not fully. Direct-to-pin has real efficiency + density advantages for the highest-density AI accelerator racks. But the 48V intermediate bus is entrenched across the OCP ecosystem, has broader vendor support, and doesn't require the same silicon-integration effort. Expect both to coexist through the 800V DC transition.
Why did Wolfspeed restructure?
Capex + demand-timing mismatch. Wolfspeed built the Mohawk Valley $5B SiC fab ahead of demand ramp. Auto/EV demand softened + industrial ramp was slower than assumed. See tech spotlight 05 for full retrospective.
What is the biggest supplier-concentration risk at Layer 6?
Vicor for direct-to-pin architectures. MPS for rack POL. But both are backed by broader silicon portfolios, so a single vendor failure doesn't break the ecosystem.
How does Chinese silicon (Innoscience for GaN, etc.) fit?
Fast-growing domestic pure-plays with material cost advantages. Global availability constrained by US + adjacent-jurisdiction export controls + national-security review, but Chinese-domestic + SEA + Middle East + emerging-market presence is meaningful.