> ## Content Index > Fetch the complete content index at: https://adikumar.co/llms.txt > Use this file to discover other available public pages before exploring further. # The Wide-Bandgap Stack: Boom, Bust, and the Rebuild of AI's Power Semiconductor Chain - URL: https://adikumar.co/the-wide-bandgap-stack/ - Published: 2026-08-01T02:06:36.000Z - Updated: 2026-10-07T05:39:13.000Z - Description: SiC and GaN are the enabling materials of 800V data centres. Boom, 60% price collapse, the Wolfspeed Chapter 11, and what comes next. Crystal boule to gate driver. - Author: Adi Kumar - Tags: #Essay, AI Power Chain, Wide-bandgap [The AI Power Chain series](https://adikumar.co/ai-power-chain/) · Part 5 of 15 ### Glossary of terms used AMB Active Metal Brazed. A ceramic substrate technology used in high-power semiconductor packaging. GaN Gallium Nitride. Wide-bandgap semiconductor material used in RF and power applications. SiC Silicon Carbide. Wide-bandgap semiconductor material used in high-voltage power electronics. TAM Total Addressable Market. The maximum revenue opportunity available if a product served every potential customer segment. WBG Wide-Bandgap. Semiconductor material class (SiC and GaN) used in high-efficiency power electronics. For the full corpus glossary of acronyms used across all essays, see [adikumar.co/glossary](https://adikumar.co/glossary/). **ADI KUMAR** · POWER & DIGITAL INFRASTRUCTUREJULY 2026 · V2 · \~50 MIN READ The AI Power Chain · Part II of IV Market deep dive · Wide-bandgap semiconductors # The Wide-Bandgap Stack: Boom, Bust, and the Rebuild of AI's Power Semiconductor Chain SiC and GaN are the enabling materials of the 800VDC data center. Their industry has just come through a capacity glut, reported price declines exceeding 60% across various SiC substrate + epi-wafer categories (specific series vary by source and vintage; not a clean like-for-like index), and the Chapter 11 filing of Wolfspeed, its founding US pure-play. This piece works down the chain from crystal boule to gate driver. By **Adi Kumar** Independent analysis Views are my own **Executive summary. Nine findings.** 1. **The bust-boom overlap.** Wolfspeed emerged from Chapter 11 in September 2025 having cut \~$4.6B of debt (\~70%). Over the same period its AI data center revenue doubled in three quarters. The bust was *automotive*; the boom is *data center*, and they overlapped. 2. **Prices collapsed.** 6-inch SiC epi wafers fell from $600+ (early 2023) to \~$400 by 2025\. Chinese 6-inch spot was reported near $200 in mid-2026 *on a single trade-press source*, not corroborated in Western procurement quotes at time of writing. 8-inch declines exceeded 60% across multiple sources. Chinese substrate capacity went from 460k units (2022) toward a projected 7.7M by 2027. 3. **AI is re-rating the whole chain.** Infineon guides AI-related revenue from €1.5B (FY26) to €2.5B (FY27) and sizes the AI power opportunity at \~€12B by 2030\. onsemi says content per 1MW AI rack doubled from \~$50k to \~$100k. 4. **Content escalation is the core investable fact.** Power component content per rack rises roughly 4x from GB200 to Vera Rubin and \~11.5x to Rubin Ultra. That is a permanent BOM restructuring. 5. **SiC and GaN divide by physics.** Voltage and switching frequency split the stack, with SiC in the high-voltage stages up front and GaN in the higher-frequency stages inside the rack. Navitas' 800V-to-6V board that *eliminates* the 48V intermediate bus is the clearest signal of where GaN is heading. 6. **Substrates have been commoditizing; packaging has held its margin.** The scarcity has migrated downstream to AMB silicon-nitride substrates, sinter pastes, and thermal materials, where Japanese and German suppliers together are estimated to hold \~80-90% share of the AMB substrate + sinter-paste + die-attach layer, with Si₃N₄ >95% of the AMB mix. The specific % is a directional estimate from industry-analyst reporting; scope + year of the underlying survey vary. 7. **Gallium is a Chinese export instrument.** China's export controls on gallium put GaN's raw-material base under policy risk that SiC does not face. The asymmetry between the two technologies is underpriced. 8. **The M&A window is wide open.** A post-restructuring Wolfspeed, sub-scale GaN specialists, and distressed Chinese substrate capacity meet buyers (Infineon's "30-30" ambition, onsemi, Renesas, Samsung) who need capacity and design-ins fast. 9. **Bottom-up TAM.** WBG devices in AI data centers at roughly $1.5-2.5B in 2026 scaling to $9-14B by 2030 in the base case. The bull case is gated by qualification. BOULEStage 0 · Wolfspeed The AI Power Chain · six essays, one physical arc The series walks a single physical path. It begins at the medium-voltage utility bus at the site fence, steps down through the substation and switchgear, arrives at the datacenter rack where **800V DC is stabilised by the capacitor stack**, is **converted by silicon-carbide switches to 48V**, is **distributed across the rack by copper busbars and whips**, is **stepped down again by multi-phase controllers on the accelerator board to 0.8V**, and finally routed through **the on-package power delivery network to a transistor gate drawing over 2,000 amperes**Waste heat from every conversion stage is removed by the thermal stack. The whole thing is packaged inside a factory-modular building because there aren't enough electricians to build it stick-frame. 1. **Part I.** [The Capacitor Stack](https://adikumar.co/the-capacitor-stack-800vdc/) 800VDC at the rack 2. **Part II.** [The Wide-Bandgap Stack](https://adikumar.co/the-wide-bandgap-stack/) SiC and GaN conversion *(you are here)* 3. **Part III.** [The Thermal Stack](https://adikumar.co/the-thermal-stack/) Removing the waste heat 4. **Part IV.** [The Interconnect Stack](https://adikumar.co/the-interconnect-stack/) Busbars and whips 5. **Part V.** [The On-Package Delivery Stack](https://adikumar.co/the-on-package-delivery-stack/) 48V to 0.8V 6. **Part VI.** [The Modular Datacenter Stack](https://adikumar.co/the-modular-datacenter-stack/) How the building gets built \~*11.5x* Power component content per rack, GB200 to Rubin Ultra €*2.5*B Infineon's FY2027 AI-related revenue target, up from €1.5B in FY2026 The price collapse that defined the cycle Discrete published price observations, USD per 6-inch wafer, 2023-2026\. Note: the series mixes epi-wafer and bare-substrate quotes from different sources. It is a set of observations to be read for direction. \[A1\] Woodside Capital Partners (Jun 2025) for 2023 epi-wafer points; eeNews Europe (Nov 2025) for 2024-25 substrate points; DigiTimes via industry press (Jun 2026) for the Chinese spot figure (**single-source, unconfirmed**). See Annex §A1 for the full reconciliation. MAPThe framework · Eight layers, one chain ## The wide-bandgap value chain, layer by layer Figure 1 · The WBG arc, 2019-2029 BOOM 2019-2023 · EV-driven capacity build BUST 2024-2025 · glut, price war, Ch. 11 REBUILD 2026-2029 · AI-DC demand pull 2021: Wolfspeed 200mm ramp Aug 2023: Infineon buys GaN Systems Jun 2025: Wolfspeed Chapter 11 Jul 2025: NVIDIA 800V DC ecosystem 2027: commercial 800V DC deployment 2019 2024 2026 2029 Three phases: EV-thesis capacity build (2019-2023), oversupply and Wolfspeed Chapter 11 (2024-2025), AI-DC demand pull rebuilding the volume chain (2026-2029). Sources: company filings, Yole 2024, NVIDIA GTC July 2025. Figure 2 · WBG value chain: five stages, each with a distinct vendor structure WAFER Wolfspeed, TanKe, SICC, Coherent Top-4 = 82% HHI \~1800 EPI Wolfspeed, II-VI, SiCrystal, showa Bundled with wafer; tight yields drive share DEVICE STMicro, onsemi, Infineon, Wolfspeed Top-4 SiC = 81%; GaN more fragmented PACKAGE Rogers, Heraeus, Kyocera, DENKA Ceramic substrate bottleneck at scale SYSTEM Vertiv, Delta, Schneider, Eaton Nearest to AI DC; integrator margin Upstream capital intensity ← → Downstream integration margin Vendor concentration: HIGH HIGH MEDIUM MEDIUM LOW Where margin migrates over 2026-2028: Upstream concentration high (wafer / epi); midstream device layer captured by four IDMs on SiC; downstream package + system layers fragmented, where integrator margin is expanding fastest as AI DC volume ramps. The capacitor stack divides by *timescale*The wide-bandgap chain divides by *process step*Each step has a different competitive structure, capital intensity, and margin profile, and the AI transition is redistributing power between them. The map below names the players at every layer. Two things to notice before reading it: the extraordinary Japanese depth in materials and packaging, and how thin the qualified supplier base becomes at the ceramic-substrate and sinter-paste layers. Wafers still hold the attention. The chokepoints have moved above them. The wide-bandgap power semiconductor market map Named players by layer, leaders highlighted, and July 2026 L1Crystal growth & substratesPVT boule growth, slicing, polishing · 150/200mm, first 300mm demo Wolfspeed ~~US · \~34%~~ TanKeBlue ~~CN · \~17%~~ SICC ~~CN · \~17%~~ Coherent ~~US · \~14%~~ SiCrystal (ROHM) ~~DE/JP~~ Resonac ~~JP~~ SK Siltron CSS ~~KR~~ Sumitomo Electric ~~JP~~ Sanan Optoelectronics ~~CN~~ Synlight Crystal ~~CN~~ JSG / Jingsheng ~~CN~~ GlobalWafers ~~TW~~ Soitec (SmartSiC) ~~FR~~ onsemi (ex-GTAT) ~~US · captive~~ ST (ex-Norstel) ~~EU · captive~~ L2EpitaxyDoped SiC/GaN layers, the yield-critical step, and mostly captive, partly merchant Wolfspeed ~~US · merchant~~ Resonac ~~JP · merchant leader~~ Epiworld ~~CN~~ Hantian / Enkris ~~CN~~ IQE ~~UK · GaN/RF~~ Episil / EpiCrystal ~~TW/CN~~ Showa Denko lineage ~~JP~~ NexWafe-adjacent ~~EU~~ L3aSiC device makersMOSFETs, diodes, JFETs, 650V to 3300V, and top five ≈ 90% of revenue STMicroelectronics ~~EU · #1~~ onsemi ~~US~~ Infineon ~~DE~~ Wolfspeed ~~US~~ ROHM ~~JP~~ Mitsubishi Electric ~~JP~~ Fuji Electric ~~JP~~ Toshiba ~~JP~~ Bosch ~~DE~~ Nexperia ~~NL~~ Microchip ~~US~~ Littelfuse (IXYS) ~~US~~ Vishay ~~US~~ Navitas (GeneSiC) ~~US · 2.3/3.3kV~~ Qorvo JFET → onsemi ~~US~~ BYD Semiconductor ~~CN~~ United Nova (UNT) ~~CN~~ BASiC Semiconductor ~~CN~~ AccoPower ~~CN~~ SemiQ ~~US~~ L3bGaN device makers100V. 650V HEMTs and power ICs · top five ≈ 88% · the AI-rack growth engine Innoscience ~~CN · \~30%~~ Infineon (GaN Systems) ~~DE~~ Power Integrations ~~US~~ Navitas ~~US~~ EPC ~~US~~ Renesas (Transphorm) ~~JP~~ STMicroelectronics ~~EU~~ Texas Instruments ~~US~~ onsemi ~~US · entering~~ Samsung ~~KR · 2026 entry~~ Cambridge GaN Devices ~~UK~~ VisIC ~~IL~~ ROHM, Toshiba, and Sanken ~~JP~~ Nexperia ~~NL~~ MACOM · Qorvo ~~US · RF GaN~~ L3cFoundriesMerchant WBG wafer capacity · the fabless enabler GlobalFoundries ~~US · Navitas partner~~ PSMC · Powerchip ~~TW~~ Vanguard (VIS) ~~TW~~ X-FAB ~~EU~~ Polar Semiconductor ~~US~~ TSMC ~~TW · exiting GaN~~ Samsung Foundry ~~KR~~ CR Micro · Silan ~~CN~~ L4Packaging materialsAMB/DBC ceramic substrates, sinter pastes, die attach, bond wire · top 8 ≈ 80-90% (est) Rogers (curamik) ~~US/DE~~ Heraeus Electronics ~~DE · \~15%~~ Kyocera ~~JP~~ Denka ~~JP~~ Mitsubishi Materials ~~JP~~ NGK / Niterra ~~JP~~ Toshiba Materials ~~JP~~ DOWA Metaltech ~~JP~~ Proterial ~~JP~~ Ferrotec ~~JP~~ Xinzhou Electronic ~~CN~~ Zhejiang TC Ceramic ~~CN~~ BYD ~~CN · captive~~ KCC · Amogreentech ~~KR~~ Indium Corporation ~~US · sinter~~ MacDermid Alpha ~~US · sinter~~ Henkel ~~DE · TIM/attach~~ Tanaka · Nippon Micrometal ~~JP · bond wire~~ L5Power modules & convertersHalf-bridges, IPMs, DC-DC bricks, PSUs, rack power boards Infineon ~~DE · modules+POL~~ Semikron Danfoss ~~DE/DK~~ Mitsubishi Electric ~~JP~~ Fuji Electric ~~JP~~ Vincotech ~~EU~~ Monolithic Power (MPS) ~~US · VRM~~ Vicor ~~US~~ Analog Devices ~~US~~ Texas Instruments ~~US~~ Renesas ~~JP~~ Delta Electronics ~~TW~~ Lite-On ~~TW~~ Flex · Celestica ~~US/CA~~ Vertiv ~~US~~ Schneider Electric ~~FR~~ ABB ~~CH/SE~~ Navitas PDB ~~US · 800V→6V~~ Littelfuse ~~US · protection~~ L6Capital equipmentThe picks-and-shovels of the picks-and-shovels Axcelis (Purion) ~~US · SiC implant~~ Aixtron ~~DE · epi~~ LPE ~~IT · epi~~ Veeco ~~US~~ DISCO ~~JP · dicing/grind~~ Applied Materials ~~US~~ KLA, Onto, and Bruker ~~US · metrology~~ Tokyo Electron · Kokusai ~~JP~~ Revasum ~~US · CMP~~ Siltectra/Infineon cold split ~~DE · captive~~ AMEC · NAURA ~~CN~~ JapanUnited StatesEuropeChinaKoreaTaiwanShaded tiles = category leaders The shares quoted are approximate and drawn from public research of differing vintages and scopes. Treat them as positional. Company names are set as text. Several firms appear at multiple layers, which matters: **vertical integration is the dominant competitive strategy**, and the companies that survived the glut are disproportionately the ones that owned their own substrate supply. L1Crystal growth & substrates In brief Silicon carbide (SiC) and gallium nitride (GaN) are the enabling semiconductors of 800V DC data centres. Five vendors, STMicroelectronics, onsemi, Infineon, Wolfspeed, ROHM, hold over 90% of SiC merchant revenue. Infineon's $830M GaN Systems acquisition (closed October 2023 per company press release) is the largest transaction in the sector. Post-Wolfspeed Ch.11 restructuring, the AI DC positioning question remains open. ## The wafer layer: chokepoint to commodity Silicon carbide sublimes (it does not melt), and that is the constraint the whole industry works around. You cannot pull a SiC boule the way you pull silicon from a Czochralski melt; you grow it by **physical vapour transport**, sublimating powder at \~2,300°C and re-condensing it on a seed crystal at millimetres per hour. A silicon boule grows in a couple of days and is two metres long. A SiC boule takes a week or more and yields perhaps 25-35mm of usable crystal. Then you cut it, with a material harder than almost anything except diamond, which is why wire-saw kerf loss historically destroyed a third of the crystal and why laser-based "cold split" techniques (Infineon's Siltectra acquisition) are strategically significant. Substrates held 40-50%+ of device cost for a decade, and every serious SiC device maker locked in captive supply during that era: onsemi acquired GT Advanced Technologies in 2016, ST bought Norstel in 2019, ROHM has run SiCrystal in-house since 2009, and Coherent inherited II-VI's franchise from the 2022 merger. Chinese capacity then arrived at scale. Beijing named SiC a strategic material, a reported CNY 50bn (\~$7bn) national fund flowed across 2024-25, and Chinese substrate output ran from \~460k units in 2022 through 2.22M in 2024 to an estimated 3.9M in 2025, projected toward 7.7M by 2027. China's substrate capacity ramp: the supply shock in one chart Chinese SiC substrate annual capacity, million units, 2022-2027E Source: industry compilations of Chinese capacity announcements (2025). Nameplate capacity. The gap between the two is where the incumbents still live. ### Market structure and share Wolfspeed still led the substrate market with roughly 34% share in 2024, but the composition beneath it tells the story. **TanKeBlue and SICC hold \~17% each**, having arrived from effectively nowhere, with Coherent at \~14%. The top five (adding SiCrystal/ROHM, Resonac, SK Siltron) control about half of global capacity. SICC leads Chinese 8-inch. TanKeBlue is the volume domestic supplier. Meanwhile Japanese and Korean suppliers (Resonac, Sumitomo Electric, SK Siltron CSS) position explicitly as the *non-Chinese* alternative for Western automakers and, increasingly, for data center supply chains where provenance rules bite. SiC substrate market share, 2024 basis, pre-restructuring Approximate revenue share on 2024 revenue of \~$1.04B. This is the most recent broadly-cited breakdown, and it is two years stale \[A2\] TrendForce (May 2025), 2024 data. **Read with caution.** Wolfspeed's share has almost certainly fallen since. The company itself disclosed customer inventory-building and second-sourcing during the Chapter 11 process, and Chinese suppliers have continued to add capacity. Treat the ranking as directional and the 2024 percentages as historic. ### The 200mm (and now 300mm) transition The economics are unambiguous. Moving from 150mm to 200mm yields roughly **2.2x more die per substrate and up to \~40% lower cost per die**, with wafer-level cost roughly 35% lower. Everyone is going there: Wolfspeed's Mohawk Valley (the first 200mm SiC fab, backed by CHIPS Act funding), Infineon's Kulim Module 3 in Malaysia now ramping, ST's Catania campus, and onsemi's Czech expansion supported by a \~€530M EU state aid package. The catch is that 200mm yields have lagged. Industry commentary through 2025 put average yields below 50%. That compressed margins for everyone at the same time, because you book the depreciation of the new fab while still selling the old wafer's economics. Then, in January 2026, Wolfspeed reportedly demonstrated a **300mm SiC boule** **This claim rests on a single research-house reference and has not been corroborated by Wolfspeed primary disclosure at time of writing**; treat it as reported (confirmed status stays absent). If real, that positions Wolfspeed for standard-setting; near-term volume stays a different story. Whoever defines the format that customers validate gets to drive a decade of tool roadmaps, and it is a reminder of what the restructuring preserved: the balance sheet failed, the materials science did not. One further caveat: a boule demonstration is many years from qualified 300mm production. **Diligence note on "capacity."** Chinese nameplate capacity and qualified automotive/data-center-grade output measure different things, and the gap is where the incumbents still live. Qualification runs 12-24 months for automotive (AEC-Q101) and is tightening for hyperscale infrastructure. When you see a capacity figure, ask three questions: what defect density, what qualification status, and whose provenance rules apply to the end customer. L2Epitaxy ## Epitaxy: where substrate quality becomes device economics Between the polished substrate and the device lies the epitaxial layer, the doped, defect-controlled crystal film the device runs on. Epi determines blocking voltage and determines *yield*. A basal-plane dislocation propagating from substrate into epi will kill a MOSFET's reliability under bipolar stress. Epi is the step where substrate quality either converts into device economics or doesn't. It is also why the substrate price collapse has not fully passed through to device prices: good epi on cheap substrate is still not cheap. Most volume epi is captive (Wolfspeed, Infineon, ST, onsemi, ROHM all run their own), which keeps the merchant market small but strategically visible. **Resonac** is the leading merchant epi-wafer supplier, Wolfspeed offers 200mm epi commercially, and Chinese players (Epiworld, Enkris for GaN) have scaled fast. The layer punches above its revenue for a few reasons. Epi is where the substrate glut gets taken up or wasted. A cheap substrate with high basal-plane dislocation density still produces expensive devices because the yield loss shows up downstream. That mechanism is why the price war has hurt Chinese device makers less than expected and Western ones more: the incumbents were already buying good material and had less to gain from cheap wafers. Reactor throughput is the hidden cost driver. SiC epi grows at a few microns per minute, and a 1200V device needs 10-12µm of drift layer, so reactor time per wafer is measured in tens of minutes against seconds for many silicon steps. Wafers per hour per tool is a first-order determinant of fab economics, which is why the tool choice matters as much as the recipe. The equipment layer itself is a genuine oligopoly. **Aixtron** and Italy's **LPE** dominate SiC epi reactors, with Veeco and Japanese suppliers in adjacent positions. That makes it one of the cleanest ways to hold exposure to WBG volume without picking a device winner. The tools get bought whether the wafers end up in a Chinese fab or a German one. For GaN the picture inverts. GaN-on-silicon epi runs on MOCVD tools (Aixtron and Veeco again, plus Chinese suppliers) on 200mm silicon substrates, and the epi is the *hard part* because you are growing a lattice-mismatched film on a foreign substrate. GaN's cost curve therefore behaves like silicon's while its supply chain behaves like a compound semiconductor's. That is why foundry partnerships (Navitas / PowerChip, Navitas / GlobalFoundries, Innoscience's integrated epi) determine competitive position more than in SiC. Anatomy of a restructuring: what Wolfspeed's Chapter 11 did The sector's defining corporate event, in numbers **The problem.** Wolfspeed built the first 200mm SiC fab (Mohawk Valley) and the Siler City materials facility on a debt-funded capex programme sized for an EV ramp that decelerated, arriving into a price collapse that halved wafer economics. **The mechanism.** A pre-packaged Chapter 11 filed 30 June 2025 with support from holders of >97% of senior secured notes, Renesas' US subsidiary (a creditor through its prepayment agreement), and >67% of convertible holders. **The outcome (emerged 29 September 2025).** Total debt reduced \~70%, roughly $4.6B; maturities extended to 2030; annual cash interest down \~60%; convertible holders took \~95% of new equity, existing shareholders diluted to 3-5%; five new directors appointed. **The trading reality afterwards.** Fiscal Q1 2026 revenue of \~$197M (roughly flat sequentially, +1% YoY), net loss cut to $85.2M from $119.8M largely by halving capex from $211.6M to $103.9M, cash of \~$926M, and guidance for revenue to *decline* to $150-190M the following quarter because customers had built inventory and second-sourced during the bankruptcy. **The lesson for diligence.** A balance sheet can be fixed in ninety days. A qualification position lost to a second source takes years to win back. That is the real cost of distress in this industry, and it does not appear in the restructuring arithmetic. L3aSiC devices ## Who are the five vendors that dominate SiC power devices? Roughly five companies (**STMicroelectronics, onsemi, Infineon, Wolfspeed, ROHM**) have controlled 90%+ of SiC device revenue. ST has led on the strength of automotive MOSFETs (the Tesla relationship being the origin story of the modern SiC industry) and is completing its vertically-integrated Catania campus plus the Sanan joint venture in China. onsemi rose fast on EliteSiC with >50% substrate self-sufficiency post-GTAT, added Qorvo's SiC JFET business for $115M in January 2025, and secured EU state aid for Czech capacity. Infineon has the broadest portfolio across Si, SiC and GaN, launched trench-based SiC superjunction devices claiming \~40% lower RDS(on)×A, and has stated a "30-30" goal of 30% global SiC share by 2030. What AI changes is the *voltage and mission profile*Automotive SiC is a 750-1200V, cost-obsessed, AEC-qualified game. Data center SiC spans a wider range: 1200V for the sidecar/rectification stages, and increasingly the **2300V and 3300V classes** for medium-voltage grid interface and solid-state transformer work, where Navitas' GeneSiC trench-assisted planar devices have carved out a genuine niche against much larger firms. Japanese module houses (Mitsubishi Electric, Fuji Electric, Toshiba) hold the traction and industrial-drive strongholds and are natural beneficiaries of any MV-DC build-out. Bosch is the automotive-captive wildcard. SiC device market: a five-firm oligopoly, 2023/24 basis Approximate revenue share. The top five have held \~90%+. The ordering below reflects 2023/24 rankings and predates both the Wolfspeed restructuring and the AI mix shift. \[A4\] TrendForce 2023 ranking (ST 32.6%, top five 91.9%), cross-read with Mordor and Yole 2024/25 commentary. Individual percentages beyond ST are the author's interpolation within published constraints. See Annex §A4\. Positions have moved a lot since; treat as directional context. ### Chinese domestic substitution is moving up-stack The market essay's story about Chinese wafer capacity is well-worn; what is less discussed is that Chinese players are now moving up the value chain into qualified device production for domestic hyperscale. BYD Semiconductor, United Nova (UNT), BASiC Semiconductor and AccoPower are all shipping SiC MOSFETs into Chinese EV programmes and, increasingly, into Chinese cloud infrastructure (Alibaba, Baidu, Tencent, ByteDance). Chinese hyperscalers have their own strong provenance preferences that cut the opposite direction to Western ones. The practical implication for the TAM discussed later in this piece is that **the $9-14B 2030 base case is a global figure; the Western-hyperscale addressable slice is materially smaller**, because Chinese cloud demand will largely be served by Chinese devices as their qualification cycles complete through 2027-29\. The annex includes a Western vs Chinese TAM split as a stress test. L3bGaN devices ## Where does GaN fit in AI data centre power? Figure 3 · SiC vs GaN vs silicon: what dominates where 10 kHz 100 kHz 1 MHz 3 MHz 10 MHz Switching frequency (log scale) 10 V 100 V 650 V 1.2 kV 3.3+ kV Blocking voltage (log scale) SILICON SiC dominant EV traction, industrial motor, and 800V AI DC front-end GaN dominant 48V POL, AI PSU, fast charging, and RF Contested overlap 400-650 V, \~500 kHz EV traction 800V Grid & industrial 3.3kV+ AI 800V front-end AI 48V POL / VRM AI PSU secondary Consumer chargers Voltage-frequency map of power semiconductor sockets. SiC covers high-voltage / low-mid frequency (EV, industrial, AI DC front-end). GaN covers low-voltage / high-frequency (48V POL, AI PSU secondary, consumer chargers). The 400-650 V, \~500 kHz overlap is where the two compete socket by socket. Gallium nitride plays complement to SiC more than competitor, and the division is physical. SiC handles high voltage and high power with superior thermal conductivity: grid-to-rack conversion, traction inverters, MV interfaces. GaN switches faster at moderate voltages, which means smaller magnetics, higher power density, and better efficiency in the intermediate and point-of-load stages inside the rack. Gartner's framing of Infineon's advantage captures the consensus precisely: **SiC for high-efficiency, high-voltage grid-to-rack conversion; GaN for ultra-dense, high-frequency intermediate stages; silicon at the processor level.** The competitive structure is younger and stranger than SiC's. **Innoscience** (China) leads with roughly 30% share, vertically integrated down to epi wafers, with an 8-inch GaN-on-Si platform and a partnership with ST that gives it Western reach. **Infineon** bought GaN Systems for $830M per company press release (announced March 2023, closed October 2023), still the largest transaction in the category, and is developing 12-inch GaN-on-Si pilot lines. **Renesas** acquired Transphorm for $339M and is on track to surpass $100M in GaN revenue. **Power Integrations** has PowiGaN plus the Odyssey vertical-GaN asset. **EPC** remains the low-voltage e-mode pioneer. **Navitas** has executed the sharpest strategic pivot in the sector, moving out of consumer chargers into "Navitas 2.0", with high-power markets contributing a majority of revenue for the first time in Q4 2025, a GlobalFoundries partnership for US-based GaN manufacturing, and 200mm GaN-on-Si at PowerChip for its 100V FETs. **Innoscience has integrated back into gallium supply itself**, which turns the raw-material risk flagged elsewhere in this piece into a company-specific advantage. It listed on the HKEX in December 2024, raising roughly $180M and giving the GaN category its first Chinese-domiciled listed vehicle. The 2025 co-development agreement with STMicroelectronics gives it a Western-qualified path into designs that provenance rules would otherwise close. The 8-inch GaN-on-Si platform (competitors sit at 6-inch or pilot 12-inch), plus vertical integration from epi through devices, adds up to a per-die cost structure the rest of the field is chasing on the 100-650V parts that dominate rack-power and consumer sockets. Not an M&A target in any realistic scenario. National champion status makes its capacity trajectory a major exogenous variable in every non-Chinese GaN player's model. Navitas' **800V-to-6V power delivery board**, shown in the NVIDIA MGX ecosystem at Computex 2026, eliminates the traditional 48V intermediate bus converter stage inside the compute tray altogether. Removing a conversion stage from the architecture redistributes BOM dollars permanently, which is why this product matters more than a typical efficiency step. ### GaN's substrate economics GaN commercial architectures split three ways on substrate, and the cost curves diverge sharply. **GaN-on-Si** is the volume play: buffer layers manage the \~17% lattice mismatch to a silicon substrate, and the epi runs on depreciated 200mm (increasingly 300mm) silicon foundry lines. Substrate cost per wafer is essentially the silicon commodity price. The constraint has moved from the substrate to yield. This is the architecture Innoscience, Infineon (GaN Systems), EPC, Navitas and Power Integrations all use for <900V products. **GaN-on-SiC** uses a silicon carbide substrate for its superior thermal conductivity, and is the workhorse for RF GaN (Qorvo, Wolfspeed's RF business, MACOM). Substrate cost is roughly 5-10x GaN-on-Si, but the thermal-conductivity advantage matters where power density is extreme. **Bulk GaN substrates** (GaN-on-GaN) eliminate lattice mismatch entirely and enable vertical GaN devices, but production-scale GaN substrates remain rare and expensive; the market is measured in tens of thousands of wafers per year, mostly from Sumitomo Electric and Mitsubishi Chemical. Bulk GaN is the enabling substrate for the vertical GaN devices that could break the 650-900V ceiling of the lateral architecture, and its scale-up curve is a critical variable in the market essay's vertical-GaN thesis. The near-term implication: GaN-on-Si dominates the <900V rack-power sockets because its cost curve tracks silicon; GaN-on-SiC holds specialty niches; GaN-on-GaN is the technology to watch for the 1200V+ vertical transition. Foundry yield curves matter for the first two more than substrate cost, because substrates are commoditised (Si) or affordable-if-specialised (SiC). Two notes on the structure of this layer. First, **foundries matter more in GaN than SiC** because GaN-on-Si runs on depreciated silicon lines. TSMC's announced exit was a shock, but GlobalFoundries, PSMC, Vanguard, X-FAB and Polar have filled in, and Samsung is preparing a 2026 entry. Second, **onsemi's absence is conspicuous**Yole's assessment that its entry is inevitable is the sort of thing that gets resolved by acquisition; organic development stays unlikely. Power GaN: ranking is sourced, the split is estimated Only two figures here are published: Innoscience at \~30% (2024) and a top-five total of \~88%. The individual shares of positions 2-5 are the author's estimates fitted to those two anchors. \[A3\] Anchors: Yole Group, "The power GaN race" (Sep 2025) for Innoscience \~30%; Intel Market Research for top-five ≈88%. **Positions 2-5 are estimates**, shown to convey structure. Ordering follows Yole's qualitative ranking. See Annex §A3. **Materials risk on both sides.** Gallium is the visible risk in the GaN thesis (Chinese export instrument since 2023). SiC is often described as "geopolitically boring" by contrast, but that framing understates SiC's own exposure to input constraints. The honest picture is a matrix of exposures across both chemistries. | Input | SiC exposure | GaN exposure | | ------------------------------------------- | ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | --------------------------------------------------------------------------------------------------------------------------------------- | | **Gallium metal** | None | \~95% of primary supply from China, formal export controls since 2023 and tightened since. The most concentrated input in either chain. | | **Silicon powder / silicon substrate** | Low. PVT charge material, commodity supply. | Silicon substrate for GaN-on-Si (the dominant commercial architecture). Commodity supply, no restriction risk. | | **High-purity graphite** | Medium. PVT crucibles, susceptors and thermal shields all consume graphite. China holds an estimated \~65% of high-purity graphite production. Some grades are subject to Chinese export-licence scrutiny under the same regime as gallium. | Medium. MOCVD reactor components draw from the same supply base. | | **Crystal growth & MOCVD equipment** | Aixtron and LPE (EU) subject to US-driven equipment export controls into China, which restricts Chinese fab tooling but does not affect Western build. | Aixtron and Veeco MOCVD tools sit under the same US-driven regime. | | **Rare-earth alloys (magnets, susceptors)** | Low but non-zero. Some PVT chamber components use rare-earth-containing alloys. | Low but non-zero. | **The takeaway.** Gallium exposure is genuinely more concentrated and more politically deployed than any single SiC input, and every bullish GaN thesis rests on an implicit assumption about gallium availability. Watch Western gallium recovery projects (Rio Tinto, Nyrstar) as the mitigating vector. But SiC carries its own risk: high-purity graphite consumables and PVT/MOCVD equipment controls run in both directions across the SiC/GaN divide, and any Chinese retaliation to further US semiconductor controls could pull them in. Any thesis that positions SiC as immune to input risk is over-selling the asymmetry. L4Packaging materials ## Where did the SiC scarcity migrate to? Thin revenue, high torque. A materials-first reader should spend time here. A SiC die switching 1200V at high frequency generates heat in a smaller area than a silicon die and runs hotter. The package usually limits the module before the die does. The critical component is the **ceramic substrate** that carries the die, insulates it, and conducts its heat out: DBC (direct bonded copper) on alumina or aluminium nitride for conventional parts, and **AMB (active metal brazed) silicon nitride** for the demanding ones. Si₃N₄ now represents over 95% of the AMB mix because its fracture toughness survives the thermal cycling that cracks alumina. This market is small in revenue but tight in supply. Estimates put it somewhere between \~$250M and \~$1.2B depending on scope, growing 9-30% depending on whose definition you take. The **top eight suppliers estimated to hold \~80-90%**Rogers (curamik) and Heraeus (\~15% share) anchor the Western supply. Kyocera, Denka, Mitsubishi Materials, NGK/Niterra, Toshiba Materials, DOWA and Proterial give Japan extraordinary depth. Production splits roughly Japan 27%, Germany 25%, China 43%, with China projected toward 57% by 2030\. Most Chinese lines remain in qualification, which is the same story as substrates one cycle earlier, and should be read the same way. Two live dynamics stand out. First, **silver**Sintered-silver die attach is what makes high-temperature SiC modules reliable, and it ties the industry's cost base to a volatile precious metal. Heraeus now markets a silver-free AMB substrate explicitly as a hedge against precious-metal exposure, and low-silver sinter pastes are an active development race between Indium Corporation, MacDermid Alpha, Henkel, Kyocera and Heraeus. Second, **bundling**The strategic move in this layer is selling the substrate, the sinter paste and the thermal interface as one qualified system. That raises switching costs enormously and is the reason these quiet Japanese and German franchises defend margin better than the wafer makers ever did. The AMB and sinter share of a high-power SiC module BOM Approximate cost breakdown for a 1200V/300A SiC half-bridge module at scale, 2026 basis Author's estimate from bill-of-materials analyses of published SiC module designs (Infineon EasyPACK, ROHM PMDUL series, onsemi ELiteSiC F1 series, Mitsubishi J-Series). AMB Si₃N₄ substrate and sintered-silver die attach together are roughly 15-22% of module BOM but \~80% of the reliability risk under thermal cycling. This is the arithmetic behind the packaging-margin thesis. The wafer was the chokepoint of the last cycle. The ceramic substrate and the sinter paste are the chokepoints of this one, and few models capture them.The materials-layer thesis L5Modules, converters & the rack ## Where WBG meets the 800VDC architecture In the 800VDC data center architecture, wide-bandgap devices appear at every conversion stage. SiC handles the sidecar rectification and any solid-state transformer front end (and in the 2300/3300V class for medium-voltage interfaces). SiC also handles the primary side of the 800V→54V/12V board-level converter, with GaN on the secondary. GaN or advanced silicon handles the point-of-load VRMs delivering \~0.7V at thousands of amps into the GPU package. An 800VDC bus moving 140kW needs only \~175A, reported to cut copper requirements by \~45% against an equivalent 54V architecture. Cumulative chain efficiency can exceed 90% versus 70-85% for the legacy AC path. At gigawatt scale that difference is tens of megawatts released back to compute. The content numbers are what make this investable, and management teams have started to disclose them. **Infineon guides $12-15k of power semiconductor content per current 130kW AI rack**, roughly $104 per kW, or \~$104k per MW. **onsemi estimates content per next-generation 1MW rack has doubled from \~$50k to \~$100k**, on \~$250M of 2025 revenue from these applications with high-teens sequential growth. Independent analysis puts power component content per rack rising \~4x from GB200 to Vera Rubin and \~11.5x to Rubin Ultra. Littelfuse reported 2025 data center design wins more than doubling year-over-year, with next-generation content opportunity "significantly more than double" current levels. Content escalation: the investable fact Indexed power component content per rack across three NVIDIA generations (GB200 = 1.0). Source: The Diligence Stack (May 2026) estimates of \~4x GB200 to Vera Rubin and \~11.5x GB200 to Rubin Ultra. Corroborated by Infineon and onsemi disclosed content-per-rack figures. Indexed for comparability. ### Who does what in the rack < | Stage | Voltage | Technology | Principal suppliers | | ------------------------------- | ---------------- | ------------------------------------ | ------------------------------------------------------------------------------------------- | | **MV interface / SST** | MV AC to 800V | SiC 1700-3300V | Infineon, Mitsubishi Electric, Fuji, Navitas (GeneSiC), Semikron Danfoss, Wolfspeed | | **Sidecar rectification / PSU** | 480VAC to 800VDC | SiC 1200V + Si | Infineon (CoolSiC), ST, onsemi, Wolfspeed, ROHM; integrated by Delta, Flex, Lite-On, Vertiv | | **Board-level HV DC-DC** | 800V to 54/12V | SiC primary + GaN secondary | Infineon, Navitas, Power Integrations, TI, MPS, Vicor, Renesas | | **Direct-conversion PDB** | 800V to 6V | GaN (eliminates 48V IBC) | Navitas (NVIDIA MGX ecosystem), Infineon, MPS | | **Point-of-load VRM** | 54/12/6V to 0.7V | GaN + advanced Si; thousands of amps | MPS, Infineon, TI, ADI, Renesas, Alpha & Omega, Vicor | | **Protection** | 800VDC | DC breakers, fuses, SSCB | Littelfuse, ABB, Schneider, Siemens, Mersen | SCALEThe dog and the tail ## Scale check: automotive is still the demand base Everything above has been a data center argument, and a reader would be right to push back. **AI data centers stay below the principal demand driver for wide-bandgap semiconductors today. Automotive is, by a wide margin.** Published estimates put automotive at roughly 61% of SiC power semiconductor revenue in 2025 on one methodology and as high as \~81% of combined SiC+GaN device revenue on a broader one. Either way, the direction of EV production volumes still moves this industry's revenue more than anything happening in Santa Clara. The case for focusing on data centers anyway rests on three points. 1. **Growth rate over level.** Automotive SiC is growing but decelerating against expectations. That is the demand miss that caused the glut. Data center WBG is compounding from a small base at rates no automotive programme can match: Infineon guiding AI-related revenue from €1.5B to €2.5B in one year, Wolfspeed's AI data-centre revenue more than doubling year-over-year in FY2026, onsemi's content per rack doubling. Marginal revenue growth is what re-rates equities and justifies capex, and it is now disproportionately coming from data centers. 2. **Margin quality.** Automotive SiC is a cost-down machine. Multi-year LTAs with annual price-down clauses, brutal qualification, single-digit-cent negotiations. Data center customers buy density, efficiency and time-to-deployment. They are less price-elastic because the power semiconductor is a rounding error against the GPU. Same die, better economics. 3. **Architecture leverage.** Automotive is a mature 400V/800V design space. Data center power architecture is being redesigned right now (800VDC, solid-state transformers, the elimination of the 48V intermediate bus) and design decisions taken in 2026-27 will lock supplier positions for a decade. The framing for a model: **automotive sets the industry's revenue base and its cycle; data center sets its growth rate, its mix, and its multiple.** A reader building a forecast should size automotive first and treat the data center as the delta. A reader looking for where competitive position is being decided should watch the data center exclusively. The risk that follows is straightforward: this sector has swapped a demand concentration in one cyclical end-market (autos) for a growing concentration in another, more correlated one (hyperscaler capex). Proportion, so the data center story stays in scale Approximate end-market split of SiC power semiconductor revenue, 2025\. Two published methodologies, shown side by side because they disagree. \[A5\] Mordor Intelligence (automotive \~61.45% of SiC power semiconductor market, 2025) vs. Intel Market Research (automotive \~81% of combined SiC+GaN device market, 2024). Scope differences (SiC-only vs SiC+GaN, device vs system) explain most of the gap. See Annex §A5. SiThe displaced incumbent ## The silicon incumbent Any technology-substitution story needs the incumbent's case put properly, and in power electronics the incumbent is enormous. IGBTs and superjunction MOSFETs represent roughly **$11.6-18.7B** depending on scope, several times the size of the entire SiC device market, and are growing 10-12% annually in their own right. Within the broader power semiconductor market of roughly $60B in 2026, silicon still does the overwhelming majority of the world's power conversion. WBG remains the fast-growing minority of a still-silicon world. Silicon also keeps improving specifically to defend itself. Toshiba's multi-gate IGBT architectures cite 24-28% lower turn-off loss (double-gate 24%; triple-gate 28% per Toshiba 2021 disclosures) than previous planar generations. Superjunction MOSFETs continue to improve the breakdown-voltage / on-resistance trade-off that was supposed to be their fundamental ceiling. Packaging innovation (double-sided cooling, embedded die) lifts silicon module performance without touching the die. Every generation of silicon improvement raises the bar that SiC's 3-5x lower switching losses have to clear *economically*, not just technically. The substitution boundary is a moving price line. SiC wins where switching frequency, thermal headroom or system-level size reduction pay for the die premium: traction inverters, fast chargers, and now the 800VDC rectification stages where efficiency compounds across a gigawatt. Silicon holds everything else, and the wafer price collapse cuts both ways. It narrows SiC's cost gap, which accelerates substitution, but it also compresses the returns available to whoever wins that substitution. **The bear case for WBG is SiC succeeding at prices that never justify the capital deployed to build it.** That is what happened between 2022 and 2025, and nothing in the structure of the industry prevents a repeat. TAMSizing · Profit pools ## What AI is worth to the wide-bandgap semiconductor industry? Top-down forecasts for SiC and GaN are abundant and contradictory. SiC power semiconductors at \~$3.4B in 2026 growing \~25% CAGR to \~$10B by 2031 on one methodology; combined GaN+SiC at \~$4.1B in 2025 reaching \~$39B by 2035 on another. I build the number from scratch below, and I build it *twice*The two available methods disagree by a factor of three, and the disagreement is the most informative output. #### Method A. Bottom-up from rack content Infineon discloses $12-15k of power semiconductor content per current 130kW AI rack. Take the $13.5k midpoint and you get **\~$104k per MW of IT load**onsemi independently puts content at \~$100k per next-generation 1MW rack. The two disclosures corroborate each other closely. Global data center power demand is running \~132GW in 2026 (up from \~104GW), with AI-optimised servers at \~31% of consumption. Roughly 18-20GW of new capacity is being added annually. Netting facility overhead to IT load (\~70%) and taking the AI-relevant share of new build, I model **\~8-10GW of AI IT-load additions in 2026**At $104k/MW that gives \~$0.9-1.0B of *rack-level* power semiconductor content, of which WBG is perhaps 45-55%. Call it **$0.4-0.6B**. #### Method B. Top-down from disclosed guidance Infineon guides €1.5B of AI-related revenue in FY2026 and is described by Gartner as the company to beat in this segment. If its share of AI power semiconductors is 30-40%, the implied total market is **€4-5B (\~$4.5-5.5B)** in 2026\. Infineon separately sizes the AI power infrastructure opportunity at \~€12B by 2030\. Applying a 45-55% WBG slice gives **\~$2.0-2.9B** of WBG device revenue in 2026. #### Reconciling Method A and Method B Method B is roughly 4x Method A, and the difference comes from definitions, not arithmetic. Method A counts only what is inside the compute rack. Method B counts **the entire power tree**: grid-side and facility conversion, UPS and switchgear electronics, PSUs, busbar systems, board-level converters and point-of-load regulation, plus service and replacement into the installed base. Infineon's own description of its AI portfolio spans "utility-scale power conversion to rack-level power supplies", which confirms the wider scope. There is also a timing effect: revenue recognised in FY2026 includes design-in and pre-build ahead of 2027 deployments. **I adopt the full-power-tree definition**, which is the economically material boundary for anyone investing in this chain. That puts WBG device revenue from AI data centers at roughly **$2.0-2.5B in 2026**, with a central path to about **$11B by 2030** (range $9-14B depending on the WBG share assumption and the pace of 800VDC adoption). Readers who prefer the narrow rack-only definition should divide by roughly four throughout. Full workings, including the scenario drivers, are in **Annex §A6**. Bottom-up TAM: WBG devices in AI data centers USD billions, full-power-tree definition (grid to GPU), 2026-2030E. Author's model. \[A6\] Author's model. Inputs: content per MW (Infineon, onsemi disclosures); AI IT-load additions derived from Gartner capacity data and JLL/McKinsey build forecasts; WBG share of power BOM 45-55%; scenario drivers in Annex §A6\. Cross-checked against Infineon's \~€12B-by-2030 AI power framing. **Illustrative. Every input is stated and adjustable.** ### Profit pools: the inversion Figure 6 · Profit pool inversion: 2026 vs 2028 2026 Today: device layer captures the majority Substrate + wafer 40% Device 45% Pkg 12% 3% 2028E Projected: inversion as commodity substrate + software carve out share Substrate + wafer 22% Device 34% Package 20% System 14% Sw 10% 0% 100% of $10-14B WBG profit pool margin migration → Device-layer profit share compresses from 45% to 34% as commodity substrate and software carve out share. Package and system integration expand fastest. Directional model based on Yole 2024 device revenue split and IHS Markit/Omdia 2028 forecast; individual vendor shares vary. The margin map of this industry has inverted over three years, and the inversion is where allocation decisions get made. In 2022, **substrates** were the scarce layer and carried 40-60% gross margins. Today, after the glut, merchant substrate margins have compressed brutally (Chinese suppliers reportedly selling near cost) and the layer is commoditising. **Devices** hold better (35-50% for qualified automotive and infrastructure parts) because the moat is now qualification and reliability data, above the wafer. **Packaging materials** (AMB substrates, sinter pastes) have become the best-defended layer at 30-45%, protected by qualification bundling and Japanese/German process depth. **Modules and rack-level converters** run 20-35%, with the AI-specific parts currently enjoying scarcity pricing that will normalize as OCP standardizes. **Equipment** (Axcelis, Aixtron, DISCO) retains 40%+ through the cycle, because both the boom and the capacity race require tools regardless of who wins. Margin migration along the WBG chain Indicative gross margin bands by layer: 2022 (substrate scarcity) vs. 2026 (post-glut, AI-led). Author's estimates from company disclosures and industry analogues. Indicative midpoints of ranges: directional. The wafer makers built the industry and captured the least of it. The tool makers and the ceramic houses never had a bad quarter.The profit-pool lesson of the SiC cycle CAPITALM&A, Disruption, and Outlook ## The M&A chessboard Figure 4 · M&A chessboard: acquirer classes × target assets Strategic IDM Infineon, ST, onsemi Adjacent semi TI, Renesas, Microchip Systems co Vertiv, Delta, Eaton Financial / PE Apollo, KKR, Carlyle Chinese state Big Fund, provincial Wolfspeed 200mm IDM, post-Ch11 CFIUS block risk Renesas: creditor path Unlikely Already lenders Blocked Navitas GaN + SiC, NVIDIA design-in onsemi: fills GaN gap TI or Renesas Vertiv / Delta strategic Small cheque size Blocked EPC / CGD / VisIC Sub-scale GaN specialists Bolt-on capability Microchip / Nexperia Rare fit Rollup thesis If controls permit Chinese substrate TanKeBlue, SICC, others Blocked Blocked Blocked Blocked Domestic rollup Ceramic AMB houses Top-8 = 85%, fragmented tail Backward integrate Bolt-on Rare fit Roll-up thesis Domestic play Fit intensity: Highest High Medium Low Very low Blocked / N/A Strategic fit intensity across the sector's target-rich set. CFIUS review the binding gate on Wolfspeed for non-US strategics; Chinese substrate consolidation is a domestic-only play; ceramic AMB and GaN specialist rollups are the deepest cross-buyer opportunities. A consolidating industry emerging from a price war, with a demand wave arriving and several sub-scale specialists holding critical IP, is the most target-rich environment in semiconductors right now. The precedents are already substantial: Infineon / GaN Systems ($830M), Renesas / Transphorm ($339M), onsemi / Qorvo SiC JFET ($115M), onsemi / GTAT, ST / Norstel, SK Siltron / DuPont SiC, Power Integrations / Odyssey, Innoscience's $180M IPO. On the minority-stake path, Denso and Mitsubishi Electric's investment into Coherent's SiC business demonstrated that customers will fund capacity directly when supply security matters more than ownership. | Asset | Situation | Logical acquirers | Logic & friction | | ------------------------------------- | -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | | **Wolfspeed** | Post-emergence: debt cut \~70%, maturities to 2030, convertible holders own \~95%, 200mm vertically integrated US footprint, 300mm demonstrated, AI DC revenue more than doubled YoY in FY26 | Strategic: Infineon (fastest route to "30-30"), onsemi, Renesas (already a creditor-turned-stakeholder), a Japanese consortium. Financial: Apollo-led lenders already own it | The most interesting asset in the sector. Friction: US national-security review of any non-US acquirer of CHIPS-funded capacity is a near-certainty; new owners may prefer to run it and re-IPO. Watch for asset-level deals (a fab, an epi line); whole-co deals stay the alternative. | | **Navitas** | Fabless, GaN + high-voltage SiC, deep NVIDIA MGX design-in, GlobalFoundries partnership, "Navitas 2.0" pivot to high power. Small relative to design-win footprint | onsemi (fills the conspicuous GaN gap), Renesas, TI, Microchip, or a power-systems strategic (Vertiv, Delta) wanting silicon-level control | Design-ins at NVIDIA are worth more than revenue run-rate. That is precisely what an acquirer pays up for. A takeout premium here is a design-win premium. | | **EPC, Cambridge GaN Devices, VisIC** | Sub-scale GaN specialists with differentiated device architectures | IDMs needing a GaN position quickly: onsemi, Microchip, Nexperia, Samsung, Chinese acquirers (subject to controls) | Small cheques, big capability transfer. Classic technology bolt-ons of a consolidating category. | | **Chinese substrate capacity** | Massive overbuild, price war, many sub-scale players below cost | Domestic consolidation under state-linked buyers. Western acquisition effectively blocked. | The consolidation will happen inside China. The output will keep pricing the global merchant market for years. A durable feature of the industry. | | **AMB / ceramic substrate houses** | Fragmenting at the tail. Top eight hold \~85%. Chinese entrants scaling. | Materials majors (Heraeus, Rogers, Kyocera) buying tail capacity. Module makers integrating backward. | Where I would look hardest for a mispriced asset. Small, unglamorous, chronically short, defended by qualification. | | **Equipment specialists** | Axcelis (SiC implant), LPE (epi), Revasum (CMP) | Larger equipment groups (AMAT, TEL, ASM). LPE-style tuck-ins into Aixtron-scale platforms. | Picks-and-shovels consolidation. Buyers have the currency and the cycle is favourable. | #### Valuation framing Three anchors for an IC discussion. **Precedent multiples.** Infineon paid \~$830M for GaN Systems at a reported high multiple of then-revenue: a capability price. Renesas paid $339M for Transphorm on similar logic. In a market where design-in position determines a decade of share, capability multiples are rational. **Distressed asset pricing.** Wolfspeed's restructuring effectively valued a vertically integrated 200mm SiC franchise (Mohawk Valley, Siler City materials, CHIPS support, 300mm capability) at the enterprise value implied by \~$1.5-2B of post-emergence debt plus a diluted equity stub. Against \~$10B+ of cumulative capex sunk into that footprint, the replacement-cost argument is stark. Against continued 6-inch price erosion, so is the caution. **Strategic-scarcity premium.** Anyone who wants qualified non-Chinese WBG capacity in the 2027-29 window has approximately five phone calls to make, and every one of those counterparties knows it. ### Technology disruption watch list | Vector | What it is | Who | Impact if it lands | | ------------------------------------------- | ------------------------------------------------------------------- | -------------------------------------------------------------- | -------------------------------------------------------------------------------------------- | | **300mm SiC** | Wolfspeed's Jan 2026 boule demo. Die-per-wafer step change. | Wolfspeed. Tool ecosystem must follow. | Resets cost curve and standards. A decade of tool roadmaps at stake. | | **Trench & superjunction SiC** | \~40% lower RDS(on)×A vs planar | Infineon, ROHM, onsemi, Navitas (trench-assisted planar) | Die shrink = more devices per wafer = deflation without margin loss for the leaders | | **Engineered substrates** | SmartSiC-style bonded thin-film substrates using less prime crystal | Soitec and partners | Breaks the boule-growth bottleneck economically. Threatens pure substrate players. | | **Laser cold-split slicing** | Eliminates most kerf loss vs wire sawing | Infineon (Siltectra), Halo and others | Effective capacity increase of 20-30% from existing crystal. Deflationary. | | **Vertical GaN & GaN-on-SiC** | Pushes GaN into higher voltage/power territory | Power Integrations (Odyssey), Navitas, research ecosystem | Erodes the clean SiC/GaN voltage boundary, which is the key competitive assumption. | | **Bidirectional switches (BDS)** | Single-device AC switching. Fewer components. | Infineon CoolGaN BDS, Nexperia, research | Simplifies rectification stages. Changes converter topology BOM. | | **Ultra-wide bandgap: Ga₂O₃, diamond, AlN** | Bandgaps beyond SiC/GaN. Theoretical efficiency leaps. | Japanese research consortia (NICT, Flosfia), US labs, startups | 2030s technology. Thermal conductivity is Ga₂O₃'s unsolved problem. Watch, don't underwrite. | | **Silver-free AMB & low-silver sinter** | Removes precious-metal exposure from module cost base | Heraeus (Condura.ultra), Indium, MacDermid Alpha | Structural cost-down and supply-risk reduction at the packaging layer | | **Double-sided cooling & embedded die** | Dies embedded in PCB/substrate, cooled both faces | Infineon, Delta, module houses, substrate makers | Doubles power density. Shifts value further into packaging. | | **SiC as a thermal material** | \~500 W/m·K heat spreaders/carriers for AI accelerators | Substrate makers seeking non-power demand | A genuinely new demand pool for a glutted material. The glut's best escape valve. | ### Standards, controls and the policy layer Figure 5 · Four instruments that drive WBG cash flows QUALIFICATION STANDARDS AEC-Q101 (automotive), JEDEC reliability suites, emerging hyperscale-infra expectations. Effect: separates nameplate capacity from sellable capacity. The real moat. Winners: incumbents with 5+ years qualified silicon EXPORT CONTROLS US restrictions on advanced tool exports to China; China gallium and germanium export licensing. Effect: bifurcates the global supply chain into Western and Chinese fabs. Winners: dual-sourced portfolios; Wolfspeed CHIPS-anchored SUBSIDIES CHIPS Act (US), EU Chips Act, Japan METI, Korea K-CHIPS, India SPECS, China Big Fund iii. Effect: multi-year capex support that changes the true cost of Western capacity. Winners: Wolfspeed, Infineon Villach, ST Catania, Rohm Chikugo TARIFFS Section 301 on Chinese-origin power semis; bilateral retaliation and CHIPS-Act guardrail penalties. Effect: reshapes vendor economics per shipment; sudden and reversible. Losers: Innoscience Western revenue; low-cost Chinese exports Device physics sets the ceiling on what a wide-bandgap semiconductor can technically achieve; these four policy and standards levers set the timing on when specific vendors realise the revenue. Qualification is the slowest and most durable, tariffs the fastest and most reversible. The four instruments that drive cash flows here are standards, controls, subsidies and tariffs. Device physics sets the ceiling; these four set the timing. **Qualification standards** (AEC-Q101 for automotive, JEDEC reliability suites, and the emerging and still immature expectations for hyperscale infrastructure) are the real moat. They are why nameplate capacity and sellable capacity diverge. **Export controls** run both ways: US restrictions on advanced equipment into China, and China's gallium controls running the other direction, with the added wrinkle that Wolfspeed's CHIPS-funded assets come with US strategic strings that constrain who could ever buy them. **Industrial policy** is writing cheques at scale: CHIPS Act grants and DOE loans in the US, the EU Chips Act behind ST's Catania and Bosch's Dresden, the \~€530M Czech package for onsemi, and China's national IC fund committing reported multi-billion sums into SiC. **Materials regulation** (the EU Critical Raw Materials Act, REACH restrictions reshaping baseplate metallization, ECHA scrutiny of die-attach chemistries) determines which processes survive in Europe. Policy operates as a primary determinant of who has capacity in 2029; background-context framing understates it. ### Trade-offs, winners and losers - **SiC vs GaN.** Complementary today, competitive at the boundary tomorrow. Vertical GaN and GaN-on-SiC push upward in voltage. SiC trench devices push downward in cost. The 650-1200V band is where they will genuinely fight, and it sits where a lot of data center content converges. - **Vertical integration vs fabless.** The glut rewarded integration (owning cheap internal wafers when merchant prices collapsed) but punished the capex. Post-glut, with substrates cheap and abundant, the *fabless* model looks materially better than it has in a decade. That is a large part of why Navitas' asset-light pivot is working. - **Deflation vs volume.** Every device-level improvement (trench, 200/300mm, cold split, engineered substrates) is deflationary per die. The industry grows in revenue only if volume outruns ASP erosion. AI helps enormously because data center content per rack is rising faster than device prices are falling, for now. - **Winners.** Infineon (breadth, scale, AI design-ins, "30-30" ambition), Navitas (design-in position vs size), the equipment layer (Axcelis, Aixtron, DISCO), the packaging-materials houses (Rogers, Heraeus, Kyocera, Denka, Mitsubishi Materials), the Japanese module incumbents if MV-DC and SST arrive, and a recapitalized Wolfspeed if AI mix outruns the 6-inch price war. - **Pressured.** Merchant substrate pure-plays without captive demand, sub-scale Chinese substrate makers heading into domestic consolidation, GaN specialists without a foundry partner or a design-in, and any business model that assumed 2022 substrate pricing would persist. - **The dominant risk.** An AI capex correction. Automotive demand is no longer the swing factor it was. This industry has re-levered itself to hyperscaler capital expenditure, which is a stronger driver in 2026 but also a more correlated one. ### Ten leading indicators to watch 1. **Wolfspeed's AI revenue mix and 200mm utilization.** The clearest single read on whether the restructuring thesis works. 2. **Infineon's progress against "30-30" and its AI revenue trajectory past €2.5B.** The sector's benchmark disclosure. 3. **Chinese 6-inch spot pricing.** If it stabilizes above \~$250, the worst is over. If it keeps sliding, more consolidation. 4. **200mm yield disclosures.** The gap between nameplate and effective capacity closes here first. 5. **onsemi's GaN entry.** Organic or by acquisition. Either way it reprices the GaN specialists. 6. **Navitas 800V-to-6V design wins converting to volume.** Validates the elimination of the 48V stage and the GaN content thesis. 7. **AMB Si₃N₄ lead times and Chinese qualification announcements.** The next chokepoint's early warning. 8. **Gallium export policy moves.** The GaN thesis's single biggest exogenous risk. 9. **SST pilot deployments in data centers.** Pulls 1700-3300V SiC demand forward by years if it lands. 10. **Any national-security review triggered by a Wolfspeed asset sale.** Tells you whether Western WBG capacity is genuinely for sale. ### Sustainability: a strong story with three honest caveats The headline case is genuinely excellent and rarely disputed. Wide-bandgap devices exist to reduce conversion losses, and in a data center context the arithmetic is large. An 800VDC chain built on SiC and GaN can exceed 90% cumulative efficiency against 70-85% for the legacy AC path. At gigawatt scale that difference is tens of megawatts that stop becoming heat and start becoming compute. Multiply across the EV and renewables fleets and WBG is one of the few semiconductor categories whose use-phase savings unambiguously dwarf its manufacturing footprint. The caveats deserve equal billing. **First, crystal growth is energy-intensive.** PVT sublimation runs at \~2,300°C for a week or more per boule, making SiC substrate manufacturing materially more energy- and carbon-intensive per wafer than silicon. That is a real embodied-carbon burden even if the lifetime balance is favourable. **Second, the fab chemistry runs dirty.** WBG fabs use fluorinated etch gases with very high global-warming potentials and are exposed to the tightening regulatory perimeter around PFAS in semiconductor manufacturing. GaN adds gallium and, in some processes, arsenic-adjacent handling requirements. **Third, the packaging layer brings a precious-metal dependency.** Sintered-silver die attach ties the module cost base and its supply-chain footprint to silver, which is why silver-free AMB substrates and low-silver pastes are being developed as much for supply resilience as for cost. *(I have not cited a specific lifecycle-assessment figure here because I could not verify one to a standard I would defend. The directional statements above are well established. The precise multiples stay less settled.)* ### The public-market exposure map For analyst readers, the listed vehicles touching each layer. Mapping only. Nothing here is a recommendation, and exposure purity varies enormously. | Layer | Listed names | Exposure purity | | ------------------------ | ------------------------------------------------------------------------------------------------------------------------------------ | ------------------------------------------------------------------------------------------------------------------------------------ | | **Substrates** | Wolfspeed (WOLF), Coherent (COHR), SICC (STAR-listed), Sanan (600703.SS), Resonac (4004.T), Soitec (SOI.PA), GlobalWafers (6488.TWO) | Wolfspeed is the purest listed SiC play and the most idiosyncratic post-restructuring. Coherent's SiC fits inside a photonics group. | | **SiC devices** | STMicro (STM), onsemi (ON), Infineon (IFX.DE), ROHM (6963.T), Mitsubishi Electric (6503.T), Fuji Electric (6504.T), BYD (002594.SZ) | Mid. SiC is a growing minority of each group's revenue. ROHM the most SiC-levered of the majors. | | **GaN devices** | Navitas (NVTS), Power Integrations (POWI), Renesas (6723.T), Innoscience (2577.HK), Infineon (IFX.DE) | High for Navitas and Innoscience. The cleanest listed GaN expressions, and correspondingly volatile. | | **Foundry** | GlobalFoundries (GFS), Vanguard (5347.TWO), PSMC (6770.TW), X-FAB (XFAB.PA) | Low purity. WBG is an incremental capacity-utilisation story for each. | | **Packaging materials** | Rogers (ROG), Kyocera (6971.T), Denka (4061.T), Mitsubishi Materials (5711.T), Niterra (5334.T), DOWA (5714.T), Ferrotec (6890.T) | Low purity, high chokepoint quality. Rogers the most levered of the Western names. Heraeus and Proterial are private. | | **Equipment** | Axcelis (ACLS), Aixtron (AIXA.DE), Veeco (VECO), DISCO (6146.T), Applied Materials (AMAT), KLA (KLAC), Onto (ONTO) | Mid-to-high for Axcelis (SiC implant) and Aixtron (epi). The purest picks-and-shovels exposure in the chain. | | **Modules / rack power** | Monolithic Power (MPWR), Vicor (VICR), Delta (2308.TW), Vertiv (VRT), Littelfuse (LFUS), Schneider (SU.PA), ABB (ABBN.SW) | Mid. Strongest near-term AI revenue visibility, weakest long-term margin defense per the profit-pool argument. | ### Where the industry is now For five years, the WBG bull case was electric vehicles. The industry sized capacity to that thesis. The EV ramp then underperformed the forecasts, and the resulting glut took the industry's founding US pure-play through bankruptcy court. What comes out the other side is a leaner, consolidated chain, better capitalised in the places that matter. The demand it now serves is AI data center power, which pays for density and efficiency in ways the automotive customer never did. Wafers have commoditised. The value has moved above them. The profits sit in the devices whose qualification data is the moat, in the packaging materials the models routinely under-count, and in the equipment whose tools get bought whichever fab wins. For operators, power semiconductor supply is no longer the binding constraint it was in 2022\. Design for the architecture you want. For investors, the money in this cycle went to the equipment makers and the packaging houses more than the wafer producers, and the setup for the next cycle points the same way. ANNEXSources, Calculations, and Assumptions ## Annex: how every derived number was built Everything in this piece is either **published** (traceable to a named source), **derived** (calculated from published inputs, with the arithmetic shown below), or **estimated** (my judgement, flagged as such). This annex covers the second and third categories so any reader can rebuild, challenge, or discard the numbers. ### §A1\. SiC wafer price observations **Status: published observations, mixed metrics.** The chart plots five discrete datapoints, and they measure different things. | Point | Value | What it measures | Source | | ---------- | --------------- | ------------------------------------------- | ----------------------------------------------------------------------------------- | | Early 2023 | \>$600 | 6-inch epi wafer, open market | Woodside Capital Partners, "The SiC Capacity Glut and its impact on GaN" (Jun 2025) | | End 2023 | $400-450 | 6-inch epi wafer (plotted at $437 midpoint) | Woodside Capital Partners (Jun 2025) | | Mid 2024 | <$500 | 6-inch substrate | eeNews Europe (Nov 2025). Plotted at $490. | | 2025 | \~$400 or lower | 6-inch substrate, mainstream quotes | eeNews Europe (Nov 2025) | | Jun 2026 | \~$200 | Chinese 6-inch substrate, benchmark spot | DigiTimes via The Economy (Jun 2026). **Single source, unconfirmed.** | *Known weakness.* The apparent uptick from end-2023 to mid-2024 is an artefact of switching from epi-wafer to substrate quotes between sources. Do not read the pattern as a trend line. Separately cited: 6-inch epi wafer average prices fell \~15.9% between 2023 and 2024, and 8-inch declines exceeded 60% (industry compilation, 2025). ### §A2\. SiC substrate market share **Status: published, 2024 vintage.** TrendForce (May 2025) on 2024 substrate revenue of \~$1.04B (down 9% YoY): Wolfspeed 33.7%, TanKeBlue 17.3%, SICC 17.1%, Coherent 13.9%. Residual 18.0% is my arithmetic (100 minus the four published shares), covering SiCrystal/ROHM, Resonac, SK Siltron, Sumitomo Electric, Synlight, JSG and others. Separately, Mordor (2026) states the top five (Wolfspeed, Coherent, ST, ROHM, SK Siltron) controlled about half of global *capacity* in 2025\. That is a different metric on a different basis and stays unreconciled here. ### §A3\. Power GaN market share **Status: two published anchors, positions 2-5 estimated.** Published: Innoscience \~30% share of power GaN (Yole Group, Sep 2025, on 2024 data); top five ≈88% of revenue (Intel Market Research, on 2024 data). Derived: the residual 58 points across positions 2-5 were allocated as Infineon 18 / Power Integrations 15 / Navitas 13 / EPC 12, with 12 points left for Renesas-Transphorm and the tail. Ordering follows Yole's qualitative description of the competitive set. **The individual values are my estimates and should not be quoted as data.** Corroborating context: Renesas' Transphorm business was described as on track to exceed $100M of GaN revenue by 2026, which is consistent with a mid-single-digit to low-double-digit share of a market of this size. ### §A4\. SiC device market share **Status: published ranking, interpolated values.** Published: TrendForce 2023 ranking gave ST 32.6% with the top five at 91.9% of revenue, order ST > onsemi > Infineon > Wolfspeed > ROHM, with ROHM at 5.0% (\~$186M). Derived: I allocated the intervening positions as onsemi 18 / Infineon 17 / Wolfspeed 14 to fit both published constraints, leaving \~14% for all others. **Only ST's and ROHM's figures are published. The middle three are interpolation.** Note that Mordor's 2026 commentary gives a different top five for the SiC power semiconductor market (Infineon, ST, Wolfspeed, onsemi, ROHM at >90% combined) and GM Insights puts Infineon at >19.5% of the *broader* power semiconductor market in 2025\. Different universes. ### §A5\. End-market split **Status: two published figures on different bases, shown side by side deliberately.** Mordor Intelligence: automotive 61.45% of the SiC power semiconductor market in 2025\. Intel Market Research: automotive \~81% of the combined SiC+GaN power device market in 2024, projected to \~83.6% by 2032\. The remaining category splits in the chart (industrial/energy, data center, other) are my estimates fitted to each source's automotive anchor and are illustrative only. The discrepancy is mostly scope: SiC-only versus SiC+GaN, and differing treatment of industrial/energy applications. ### §A6\. TAM model for WBG devices in AI data centers **Status: derived. Full workings below.** **Published inputs.** Content per rack: Infineon guides $12-15k per 130kW AI rack; $13.5k ÷ 0.13MW = **$103.8k per MW**onsemi: content per next-generation 1MW rack doubled from \~$50k to \~**$100k per MW**An independent corroboration within 4%. Capacity: Gartner puts global data center power demand at \~132GW in 2026 (from \~104GW in 2025), with AI-optimised servers at \~31% of consumption in 2026 (from \~20% in 2025) rising toward \~50% by 2030\. Build rate: JLL and others put new capacity additions at roughly 18-20GW annually through 2027-29, rising to \~31GW in 2029-30, with \~100GW added 2026-2030\. McKinsey projects \~156GW of AI-related capacity by 2030. **Derivation of AI IT-load additions.** Facility capacity additions \~18-20GW/yr (2026-27); AI-relevant share of *new build* assumed at 55-65% (well above AI's \~31% share of the installed base, because new build skews heavily to AI); therefore \~10-13GW/yr of AI facility capacity. IT load at \~70% of facility power (Brookings: servers ≈60% of DC electricity, \~75% in AI-optimised hyperscale) gives **\~7-9GW/yr of AI IT-load additions in 2026**, rising to \~14-18GW/yr by 2030 as both build rate and AI share increase. **Method A (rack-only).** 8.5GW × $104k/MW = \~$0.88B of rack-level power semiconductor content in 2026\. WBG share of that BOM assumed 45-55% (SiC in rectification and HV DC-DC; GaN in intermediate and some POL stages; silicon retains much of point-of-load and control), giving **\~$0.40-0.49B**. **Method B (full power tree).** Infineon FY2026 AI revenue guidance €1.5B ÷ assumed 30-40% share gives implied market €3.75-5.0B (\~$4.3-5.7B at 1.15 USD/EUR). WBG slice at 45-55% gives **\~$1.9-3.1B**Midpoint adopted: **\~$2.2B for 2026.** **Why they differ (4x).** Method A counts only in-rack content. Method B captures the full chain from utility conversion through UPS/switchgear electronics, PSUs, busbars, board-level converters and point-of-load, which is how Infineon itself describes its AI portfolio, plus installed-base service and pre-build revenue recognised ahead of deployment. Neither is wrong. They answer different questions. The article adopts Method B and says so. **Scenario construction to 2030.** Base case: AI IT-load additions growing to \~15GW/yr by 2030; WBG share of power BOM rising from \~50% to \~60% as 800VDC penetrates and SiC enters MV/SST stages; content per MW roughly flat in nominal terms (density-driven content increases offsetting \~8-12% annual device ASP erosion). Result: \~$11B by 2030\. Bear case: AI capex air-pocket cutting additions growth by half, 800VDC adoption slipping a generation, WBG share stalling at \~45%. Result: \~$4.5B. Bull case: 1MW racks on schedule, SST pilots pulling 1700-3300V SiC forward, retrofit wave into the 2025-26 installed base, WBG share \~65%. Result: \~$16B. **Cross-check.** Infineon sizes the total AI power infrastructure opportunity at \~€12B (\~$13.8B) by 2030\. A WBG slice of 55-65% of that implies \~$7.6-9.0B, somewhat below my base case. The gap is my assumption that Infineon's framing captures its own addressable view (the full global market sits larger). A reader who prefers Infineon's framing should shade the base case down by 15-25%. **Sensitivity.** The model is most sensitive, in order, to: (1) the WBG share of the power BOM (a ±10pt swing moves the 2030 base case by roughly ±$2B); (2) AI IT-load addition growth, itself gated by grid interconnect timelines discussed in [*Part IV: The Interconnect Stack*](https://adikumar.co/the-interconnect-stack/) (a 4-7 year US ISO queue is a real bear-case driver; (3) device ASP erosion, which could turn a volume boom into flat revenue if it runs above 15% annually. **Western hyperscale vs Chinese cloud split.** The base-case TAM is global. Western hyperscalers (US, EU) source almost exclusively from Western/Japanese devices under strict provenance rules; Chinese hyperscalers (Alibaba, Baidu, Tencent, ByteDance) increasingly source domestic Chinese devices for the same reasons in reverse. The addressable-market split for Western device vendors is therefore materially smaller than the global TAM implies. Split shown below. 2030 TAM split: Western-hyperscale vs Chinese-cloud addressable Base case \~$11B by 2030, decomposed by end-market accessible to Western device vendors Author's decomposition. Assumes Western hyperscalers source \~95% Western/Japanese devices; Chinese hyperscalers \~70% domestic Chinese devices by 2030 (up from \~35% in 2026, tracking the qualification cycle at BYD Semi, UNT, BASiC, Innoscience). Rest of world (India, MENA, LATAM) is smaller and mostly Western-served for now. The Western-vendor addressable slice is \~$7-8B of the $11B global base case by 2030, or \~65-75% of it. TAM waterfall: how Method A gets to Method B Bridge from rack-only content to full-power-tree market, 2026, USD billions Method A rack-level content \~$0.45B, plus grid-side and facility conversion (UPS, switchgear), plus board-level converters and POL regulation, plus service and installed base, plus pre-build revenue recognised ahead of deployment. The full sum lands inside the Method B range of $1.9-3.1B. Each bar is a definitional adjustment. Regional supply by layer, Marimekko view Column width = share of layer revenue. Column height segments = geographic origin. 2024-25 basis. **Substrates**US · Wolfspeed 34% China · TanKe+SICC 34% US · Coherent 14% JP/KR/other 18% **SiC devices**EU · STMicro 32% US · onsemi 18% EU · Infineon 17% US · Wolfspeed 14% JP · ROHM+others 19% **GaN**CN · Innoscience 30% US · Navitas+POWI+EPC 33% EU · Infineon 19% Other 18% **Packaging**Japan · Kyocera+Denka+MMC 60% DE · Rogers+Heraeus 25% CN · scaling 15% **Equipment**US · Axcelis+AMAT+KLA 40% EU · Aixtron+LPE 30% JP · DISCO+TEL 25% Other 5% ← column widths approximately proportional to 2025 layer revenue column height segments = geographic share of that layer Layer shares from TrendForce (substrates), TrendForce+Mordor (devices), Yole (GaN), Intel Market Research (packaging). Regional splits from §A2\. A4\. Illustrative reading device. ### §A7\. Profit pool / margin bands **Status: estimated.** No source publishes gross margin by value-chain layer for this industry. The bands shown (substrates \~50% to 18%, epitaxy \~38% to 30%, devices \~35% to 42%, packaging materials \~32% to 38%, modules \~25% to 28%, equipment \~42% to 44%) are my judgement, built from company-reported segment margins where disclosed (Infineon, onsemi, Wolfspeed, Aixtron, Axcelis, Rogers, Coherent); the documented substrate price collapse (§A1) applied against broadly fixed cash costs; reported Chinese substrate selling near or below cost; and analogues from the lithium-ion materials chain where a scarce upstream commoditised faster than a qualified midstream. **These are directional illustrations of a migration.** ### §A8\. Content escalation index **Status: published, re-indexed.** Source: The Diligence Stack (May 2026) estimates power component content per rack rising \~4x from GB200 to Vera Rubin and \~11.5x from GB200 to Rubin Ultra. I have simply set GB200 = 1.0 and plotted 1.0 / 4.0 / 11.5\. This measures *power components* broadly, and it is one analyst's estimate (a manufacturer disclosure stays absent). ### §A9\. Other published figures used - **Wolfspeed restructuring.** Debt reduced \~70% / \~$4.6B, maturities to 2030, cash interest down \~60%, filed 30 Jun 2025, emerged 29 Sep 2025, convertible holders \~95% of new equity, existing shareholders 3-5%. Source: Wolfspeed press releases and SEC Form 8-K (Jun. Sep 2025). FQ1 2026 per company 10-Q: revenue $196.8M, net loss $85.2M (from $119.8M), capex $103.9M (from $211.6M), cash + ST investments $926M, guidance $150-190M. Source: Semiconductor Today via EAM Vision (Nov 2025). - **Chinese substrate capacity.** 460k (2022), 1.17M (2023), 2.22M (2024), 3.9M (2025E), 7.71M (2027E) units. CNY 50bn national IC fund commitment 2024-25\. Source: industry compilations (2025) and Mordor (2026). Nameplate. - **200mm economics.** 2.2x more die per substrate, up to \~40% lower cost per unit, \~35% lower cost per wafer vs 150mm. Global average 200mm yield reported below 50%. Source: Mordor Intelligence and industry press (2025-26). - **Infineon.** FY2026 AI revenue target €1.5B rising to €2.5B in FY2027\. \~€12B AI power opportunity by 2030\. FY2026 capex raised €500M to €2.7B. "30-30" ambition of 30% SiC share by 2030\. Trench SiC superjunction claiming \~40% lower RDS(on)×A. Named by Gartner as company to beat in AI data center power. Sources: Infineon disclosures, Reuters via Astute Group, 247WallSt, Semiconductor Today (2026). - **Navitas.** 800V-to-6V power delivery board eliminating the 48V IBC stage, shown in NVIDIA MGX ecosystem, Computex Jun 2026\. GlobalFoundries foundry partnership. PowerChip 200mm GaN-on-Si for 100V FETs. 2300V/3300V SiC sampling. High-power markets a majority of revenue for the first time in Q4 2025\. Sources: Navitas press releases and SEC 8-K filings (2025-26). - **onsemi.** Content per 1MW AI rack \~$50k to \~$100k. \~$250M 2025 revenue from these applications. Qorvo SiC JFET acquisition $115M (Jan 2025). \~€530M EU state aid for Czech SiC facility (Nov 2025). Sources: company disclosures and trade press. - **M&A precedents.** Infineon / GaN Systems $830M; Renesas / Transphorm $339M; Innoscience IPO $180M. Source: Yole Group. onsemi / GTAT, ST / Norstel, SK Siltron / DuPont SiC, Power Integrations / Odyssey. Source: trade press. - **AMB substrates.** Top eight ≈85% share (2023). Si₃N₄ >95% of AMB mix. Production split Japan 27.3% / Germany 24.6% / China 43.5%, China to \~57% by 2030\. Heraeus \~15% share. Heraeus Condura.ultra silver-free product. Sources: Intel Market Research, Global Growth Insights, Heraeus Electronics (2025-26). Market size estimates range from \~$243M (2025) to \~$1.2B (2024) across sources on differing scopes. This spread is unresolved. I have quoted the range (picking one would overstate confidence). - **Silicon incumbent.** IGBT + superjunction MOSFET market $11.6B (2025, Mordor) to $18.7B (2025, Metastat) depending on scope. \~10-12% CAGR. Total power semiconductor market \~$60B in 2026 (Mordor). Toshiba dual-sided multi-gate IGBT \~34% lower turn-off loss, as cited. - **800VDC efficiency.** \~175A at 140kW on an 800V bus, \~45% copper reduction vs 54V, chain efficiency >90% vs 70-85% legacy AC, board-level HV DC-DC at 97-98.5%. Source: Bristlemoon Research (Jun 2026). **A general caution on this sector's market data.** Research houses disagree by factors of two to four on nearly every WBG number, driven by scope (device vs module vs system; SiC-only vs SiC+GaN; merchant vs captive) and by vintage. Where I found a spread I have shown it; picking the flattering end would overstate the case. Where a figure rests on one source I have said so. Where I filled a gap with judgement I have labelled it an estimate. Readers doing real diligence should treat this annex as a starting map. SERIESRelated in the AI Power Chain ### What comes next This is Part II of a six-part series on the AI power chain. Part I ([*The Capacitor Stack*](https://adikumar.co/the-capacitor-stack-800vdc/)) traced how hybrid supercapacitors, EDLCs, MLCCs and silicon capacitors became scarce simultaneously under the 800VDC transition. Part III ([*The Thermal Stack*](https://adikumar.co/the-thermal-stack/)) does the same for liquid cooling: cold plates, CDUs, immersion, and the shift from air to two-phase. Part IV ([*The Interconnect Stack*](https://adikumar.co/the-interconnect-stack/)) covers the copper and grid equipment that transmit the pulses these devices switch. Part V ([*The On-Package Delivery Stack*](https://adikumar.co/the-on-package-delivery-stack/)) covers the 48V-to-0.8V last-mile conversion at the accelerator itself. Part VI ([*The Modular Datacenter Stack*](https://adikumar.co/the-modular-datacenter-stack/)) covers the modular civil and electrical infrastructure needed to build hyperscale AI campuses on the schedule the sector requires. Same method throughout: name the players, size the layers, mark the chokepoints, adopt bottom-up TAM, and be explicit about what is published, derived and estimated. For readers who want the underlying physics, manufacturing process flows and device cross-sections, see the technical companion: [**The Wide-Bandgap Stack: Technical Companion**](https://adikumar.co/the-wide-bandgap-stack-technical-companion/). For a company-level deep dive on the largest US SiC pure-play post-Chapter 11, its 10 kV MOSFET first-mover position, and the MV SST customer set, see [**Tech Spotlight 05: Wolfspeed's Second Act**](https://adikumar.co/tech-spotlight-05-wolfspeed-sic-retrospective/). **Series.** The AI Power Chain (six parts). Part I: [*The Capacitor Stack*](https://adikumar.co/the-capacitor-stack-800vdc/)Part I-A: [*Technical Companion*](https://adikumar.co/the-capacitor-stack-technical-companion/)Part II: [*The Wide-Bandgap Stack*](https://adikumar.co/the-wide-bandgap-stack/)Part II-A: [*Technical Companion*](https://adikumar.co/the-wide-bandgap-stack-technical-companion/)Part III: [*The Thermal Stack*](https://adikumar.co/the-thermal-stack/)Part III-A: [*Technical Companion*](https://adikumar.co/the-thermal-stack-technical-companion/)Part IV: [*The Interconnect Stack*](https://adikumar.co/the-interconnect-stack/)Part IV-A: [*Technical Companion*](https://adikumar.co/the-interconnect-stack-technical-companion/)Part V: [*The On-Package Delivery Stack*](https://adikumar.co/the-on-package-delivery-stack/)Part V-A: [*Technical Companion*](https://adikumar.co/the-on-package-delivery-stack-technical-companion/)Part VI: [*The Modular Datacenter Stack*](https://adikumar.co/the-modular-datacenter-stack/)Part VI-A: [*Technical Companion*](https://adikumar.co/the-modular-datacenter-stack-technical-companion/). **Methodology.** This analysis is independent and based entirely on public information. Market sizes and shares are approximate, compiled from public research (TrendForce, Yole Group, Mordor Intelligence, IDTechEx-adjacent sources, Intel Market Research, Persistence, MarketsandMarkets), company disclosures and SEC filings (Wolfspeed, Navitas, Infineon, onsemi), and trade press (Semiconductor Today, eeNews Europe, Compound Semiconductor, DigiTimes, Woodside Capital Partners, The Diligence Stack) through July 2026\. Share figures of differing vintages are labelled as such; where sources conflict, ranges are given. Company names are rendered as text. Nothing here is investment advice. © 2026 Adi Kumar · Power & Digital Infrastructure · Corrections and disagreements welcome, that is what the piece is for. The AI Power Chain: series companions - [The AI Power Chain: Vendor Screen](https://adikumar.co/ai-power-chain-vendor-screen/). The vendor map across every layer - [Pricing Under Scarcity](https://adikumar.co/pricing-under-scarcity/). Where premium capture is compounding - [The Services Inversion](https://adikumar.co/services-inversion/). Why services now command product-like multiples ## Frequently asked What are the key semiconductor innovations enabling high-efficiency 800V DC? Silicon carbide (SiC) MOSFETs and gallium nitride (GaN) HEMTs are the enabling innovations. SiC handles the 800V bus-level switching (Wolfspeed, Infineon, ST, onsemi, ROHM). GaN handles the higher-frequency point-of-load down-conversion (Navitas, EPC, Infineon post-GaN-Systems). Together they enable 30-50% loss reduction over silicon IGBTs at these voltage classes. Which power semiconductor vendors offer the best protection features for AI data centres? For AI data centre 800V DC applications: Infineon leads on integrated gate-drive protection, Wolfspeed on high-voltage-class SiC (post-emergence from Ch.11), ST on cost-optimised automotive-grade parts crossed over to industrial, and Navitas on GaN with integrated driver + protection. Choice depends on voltage class and switching frequency. See the vendor screen for scoring. What is onsemi's wide-bandgap strategy in AI servers? onsemi supplies SiC MOSFETs and modules for the 800V DC bus + rack-conversion stages, plus GaN HEMTs (via the Qorvo SiC JFET acquisition and Transphorm-adjacent lineage). Its share is material in the 650V-1200V power semiconductor space but trails Infineon and ST at the higher voltage classes.